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| 型號： | PEB2466-H |
| 英文描述： | LTC3409 Evaluation Kit |
| 中文描述： | A-Law/u-Law編解碼器 |
| 文件頁數(shù)： | 45/73頁 |
| 文件大?。?/td> | 1618K |
| 代理商： | PEB2466-H |
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PEB 2466
PEF 2466
Interface Description
Hardware Reference Manual
36
2001-02-20
5.4.1
Serial Microcontroller Interface Pins
Table 26
Serial Microcontroller Interface: Pins and Functions
5.4.2
Write Access
Following a falling edge of CS#, the first eight bits received on DIN specify the type of
command. The data bytes following a write command are stored in the selected
configuration registers or the selected part of the Coefficient RAM. The number of data
bytes depends on the type of command. After every command CS# must be set to
’
1
’
.
.
Figure 21
Example for a Two-Byte Write Access
5.4.3
If the first eight bits received via DIN represent a read command, the SICOFI
4-μC will
initiate its response via DOUT. An identification byte (81
H
) is followed by the requested
number of data bytes (contents of configuration registers or contents of the CRAM).
During execution of a read command, the device will ignore data on DIN. After every
command CS# must be set to
’
1
’
.
Read Access
Symbol
CS#
DCLK
DIN
DOUT
Pin
17
18
19
20
Function
Chip Select, enable to read or write data, active low.
Data Clock, shifts data from or to device; max. clock rate is 8192 kHz.
Control Data Input; sampled with rising edge of DCLK.
Control Data Output; bits are shifted with the falling edge of DCLK;
DOUT is in high impedance state when no data is transmitted from
the SICOFI
4-μC.
7 6 5 4 3 2 1 0
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
DIN
DOUT
DCLK
CS#
Write Command
Data Byte 1
Data Byte 2
High 'Z'
2466_222
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