參數(shù)資料
型號: PDI1394P11A
廠商: NXP Semiconductors N.V.
英文描述: 3-port physical layer interface
中文描述: 三端口物理層接口
文件頁數(shù): 7/20頁
文件大?。?/td> 135K
代理商: PDI1394P11A
Philips Semiconductors
Preliminary specification
PDI1394P11A
3-port physical layer interface
1999 Mar 10
7
12.0
OTHER DEVICE I/O
SYMBOL
PARAMETER
TEST CONDITION
LIMITS
UNIT
MIN
TYP
MAX
I
DD
Supply current
V
DD
= 3.3 V
One port transmitting
One port receiving
One port not connected
60
mA
V
DD
= 3.6 V
V
DD
= 3.6 V
R
L
= 400 k
to CPS pin
I
OH
= Max., V
DD
= Min.
I
OL
= Min., V
DD
= Max.
175
mA
Power-down mode
1.5
4.7
2
5
mA
V
V
V
V
P
V
OH
V
OL
Cable Power Threshold Voltage
High-level output voltage
Low-level output voltage
Input current, LREQ, LPS, PD,
TESTM[1:2]
OFF-state output current, CTLn,
Dn, C/LKON I/Os, PC[0:2] inputs
7.5
V
DD
– 0.55
0.5
I
I
V
I
= 5.5 V or 0 V, ISO– = 0
±
1.0
μ
A
I
OZ
V
O
= 5.5 V or 0 V, ISO– = 0
±
5.0
μ
A
I
PU
Pullup current RESET input
Pullup current, RESET– input
V
I
= 1.5 V
V
I
= 0 V
V
I
= V
DD
PD = high
C = 0.1
μ
f
–20
–40
–80
μ
A
μ
A
–22
–45
–90
I
PD
Pulldown current RESET input
Pulldown current, RESET– input
100
260
450
μ
A
Power-up reset time, RESET– input
Positive arbitration comparator threshold
voltage
Negative arbitration comparator threshold
voltage
Speed signal input threshold voltage
Positive going input threshold voltage,
LREQ, CTLn, Dn inputs
Negative going input threshold voltage,
LREQ, CTLn, Dn inputs
TPBIASn output voltage
Absolute value of bus holding current
LREQ, PD, CTLn, Dn inputs, LPS
2
ms
V
TH+
89
168
mV
V
TH–
–168
–89
mV
V
TH–SP
49
131
mV
V
IT+
V
DD
/2 + 0.12
V
DD
/2 + 0.66
V
V
IT–
V
DD
/2 – 0.66
V
DD
/2 – 0.12
V
V
O
1.665
1.85
2.015
V
I
b
ISO– = high, V
I
= 0.5 V
DD
190
μ
A
13.0
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
TEST CONDITION
LIMITS
UNIT
MIN
TYP
MAX
R
Θ
jA
R
Θ
jC
Junction-to-free-air thermal resistance
Board mounted, no air flow
92.5
°
C/W
°
C/W
Junction-to-case thermal resistance
10.4
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