參數(shù)資料
型號: PCX7447AVGH1167NB
廠商: Atmel
文件頁數(shù): 32/52頁
文件大?。?/td> 0K
描述: IC MPU 32BIT 1167MHZ 360CBGA
標準包裝: 44
處理器類型: PowerPC 32-位 RISC
速度: 1.167GHZ
電壓: 1.1V
安裝類型: 表面貼裝
封裝/外殼: 360-CBBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 360-CBGA(25x25)
包裝: 托盤
38
0833E–HIREL–01/07
PC7447A
e2v semiconductors SAS 2007
11.7
Substrate Capacitors for the PC7447A, 360 HITCE
Figure 11-4 shows the connectivity of the substrate capacitor pads for the PC7447A, 360 HITCE. All capacitors are 100 nF.
Figure 11-4. Substrate Bypass Capacitors for the PC7447A, 360 HITCE
12. System Design Information
This section provides system and thermal design recommendations for successful application of the
PC7447A.
12.1
PLL Configuration
The PC7447A PLL is configured by the PLL_CFG[0:4] signals. For a given SYSCLK (bus) frequency, the
PLL configuration signals set the internal CPU and VCO frequency of operation. The PLL configuration
for the PC7447A is shown in Table 12-1 on page 39 for a set of example frequencies. In this example,
shaded cells represent settings that, for a given SYSCLK frequency, result in core and/or VCO frequen-
cies that do not comply with the 1400 MHz column in Table 9-2 on page 25. When enabled, dynamic
frequency switching (DFS) also affects the core frequency by halving the bus-to-core multiplier; see sec-
1
C1-2
C1-1
C2-1
C3-1
C4-1
C5-1
C6-1
C6-2
C5-2
C4-2
C3-2
C2-2
C18-1
C18-2 C17-2 C16-2
C15-2 C14-2
C13-2
C13-1
C14-1
C15-1
C16-1
C17-1
C12-1
C12-2
C11-2
C10-2
C9-2
C8-2
C7-2
C7-1
C8-1
C9-1
C10-1
C11-1
C19-2
C19-1
C20-1
C21-1
C22-1
C23-1
C24-1
C24-2
C23-2
C22-2
C21-2
C20-2
A1 CORNER
C1
GND
VDD
C2
GND
VDD
C3
GND
OVDD
C4
GND
VDD
C5
GND
VDD
C6
GND
VDD
C7
GND
VDD
C8
GND
VDD
C9
GND
VDD
C10
GND
VDD
C11
GND
VDD
C12
GND
VDD
C13
GND
VDD
C14
GND
VDD
C15
GND
VDD
C16
GND
OVDD
C17
GND
VDD
C18
GND
OVDD
C19
GND
OVDD
C20
GND
VDD
C21
GND
OVDD
C22
GND
VDD
C23
GND
OVDD
C24
GND
VDD
Capacitor
Pad Number
-1
-2
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