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參數(shù)資料
| 型號： | PCM3002 |
| 英文描述： | 16-/20-Bit Single-Ended Analog Input/Output SoundPlus8482， |
| 中文描述： | 16-/20-Bit單端模擬輸入/輸出SoundPlus8482， |
| 文件頁數(shù)： | 22/23頁 |
| 文件大?。?/td> | 337K |
| 代理商： | PCM3002 |
PCM3002/3003
22
EXTERNAL MUTE CONTROL
For Power-Down ON/OFF control without click noise which
is generated by DAC output DC level change, the External
Mute control is general required. The control sequence,
which is External Mute ON, CODEC Power-Down ON,
SYSCLK stop and resume if necessary, CODEC Power-
down OFF, and External Mute OFF is recommended. Note
that if SYSCLK is stopped when Power-Down condition for
the PCM3002, all internal mode is initialized and need to re-
write mode register value.
THEORY OF OPERATION
ADC SECTION
The PCM3002/3003 ADC consists of two reference circuits,
a stereo single-to-differential converter, a fully differential
5th-order delta-sigma modulator, a decimation filter (includ-
ing digital high pass), and a serial interface circuit. The
Block Diagram in this data sheet illustrates the architecture
of the ADC section, Figure 1 shows the single-to-differential
converter, and Figure 14 illustrates the architecture of the
5th-order delta-sigma modulator and transfer functions.
An internal reference circuit with three external capacitors
provides all reference voltages which are required by the
ADC, which defines the full scale range for the converter.
The internal single-to-differential voltage converter saves
the design, space and extra parts needed for external cir-
cuitry required by many delta-sigma converters. The internal
full-differential signal processing architecture provides a
wide dynamic range and excellent power supply rejection
performance. The input signal is sampled at 64X
oversampling rate, eliminating the need for a sample-and-
hold circuit, and simplifying anti-alias filtering require-
ments. The 5th-order delta-sigma noise shaper consists of
five integrators which use a switched-capacitor topology, a
comparator and a feedback loop consisting of a one-bit
DAC. The delta-sigma modulator shapes the quantization
noise, shifting it out of the audio band in the frequency
domain. The high order of the modulator enables it to
randomize the modulator outputs, reducing idle tone levels.
The 64f
S
one-bit data stream from the modulator is con-
verted to 1f
S
18-bit data words by the decimation filter,
which also acts as a low pass filter to remove the shaped
quantization noise. The DC components are removed by a
high pass filter function contained within the decimation
filter.
THEORY OF OPERATION
DAC SECTION
The delta-sigma DAC section of PCM3002/3003 is based on
a 5-level amplitude quantizer and a 3rd-order noise shaper.
This section converts the oversampled input data to 5-level
delta-sigma format. A block diagram of the 5-level delta-
sigma modulator is shown in Figure 14. This 5-level delta-
sigma modulator has the advantage of stability and clock
jitter sensitivity over the typical one-bit (2 level) delta-sigma
modulator. The combined oversampling rate of the delta-
sigma modulator and the internal 8X interpolation filter is
64f
S
for a 256f
S
system clock. The theoretical quantization
noise performance of the 5-level delta-sigma modulator is
shown in Figure 15.
+
+
–
+
+
+
5th SW-CAP
Integrator
4th SW-CAP
Integrator
3rd SW-CAP
Integrator
2nd SW-CAP
Integrator
1st SW-CAP
Integrator
+
+
+
+
–
+
+
–
1-Bit
DAC
H(z)
Qn(z)
Analog In
X(z)
Digital Out
Y(z)
Y(z) = STF(z) X(z) + NTF(z) Qn(z)
Signal Transfer Function
Noise Transfer Function
STF(z) = H(z)/[1 + H(z)]
NTF(z) = 1/[1 + H(z)]
Comparator
FIGURE 13. Simplified 5th-Order Delta-Sigma Modulator.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCM3002/PCM3003 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM3002. PCM3003 - 16-/20-Bit Single-Ended Analog Input/Output SoundPlus STEREO AUDIO CODECs |
| PCM3002_07 | 制造商:BB 制造商全稱:BB 功能描述:16/20-BIT SINGLE-ENDED ANALOG INPUT/OUTPUT STEREO AUDIO CODECS |
| PCM3002E | 功能描述:接口—CODEC 16/20-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PCM3002E | 制造商:Texas Instruments 功能描述:AUDIO CODEC IC 制造商:Texas Instruments 功能描述:IC, AUDIO CODEC, 20BIT, 48KHZ, SSOP-24 |
| PCM3002E/2K | 功能描述:接口—CODEC 16/20-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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