- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄382384 > PCM3002 16-/20-Bit Single-Ended Analog Input/Output SoundPlus8482， PDF資料下載
參數(shù)資料
| 型號(hào)： | PCM3002 |
| 英文描述： | 16-/20-Bit Single-Ended Analog Input/Output SoundPlus8482， |
| 中文描述： | 16-/20-Bit單端模擬輸入/輸出SoundPlus8482， |
| 文件頁(yè)數(shù)： | 15/23頁(yè) |
| 文件大?。?/td> | 337K |
| 代理商： | PCM3002 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)當(dāng)前第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)
15
PCM3002/3003
SYSTEM CLOCK
The system clock for PCM3002/3003 must be either 256f
S
,
384f
S
or 512f
S
, where f
S
is the audio sampling frequency.
The system clock should be provided to SYSCLK (pin 9).
PCM3002/3003 also has a system clock detection circuit
which automatically senses if the system clock is operating at
256f
S
, 384f
S
, or 512f
S
. When 384f
S
or 512f
S
system clock is
used, the clock is divded into 256f
S
automatically. The 256f
S
clock is used to operate the digital filter and the delta-sigma
modulator.
Table I lists the relationship of typical sampling frequencies
and system clock frequencies and Figure 5 illustrates the
system clock timing.
RESET
PCM3002/3003 has an internal Power-On Reset circuit, as
well as an external forced reset. The internal Power-On Reset
initializes (resets) when the supply voltage V
DD
>2.0V (typ).
External forced reset occurs when RST = LOW for PCM3002,
or both, PDAD = LOW and PDDA = LOW for PCM3003.
During V
CC
<2.2V and/or internal initialize state (1024
system clocks count after V
CC
>2.2V) for Power-On Reset or
during reset signal is forced to device or internal initialize
state (1024 system clocks count after PDAD = HIGH or
PDDA = HIGH) for external reset, the outputs of the DAC
are invalid and forced to GND. The analog outputs are then
forced to 0.5V
CC
during t
DACDLY1
(16384/f
S
) after reset
removal. The outputs of ADC are also invalid, the digital
outputs are forced to all zero during t
ADCDLY1
(18432/f
S
)
after reset removal. Figures 6 and 7 illustrate the Power-On
reset timing, external reset timing and ADC, DAC output
response for Reset and Power-Down ON/OFF.
SAMPLING RATE FREQUENCY
(kHz)
SYSTEM CLOCK FREQUENCY
(MHz)
256f
S
8.1920
11.2896
12.2880
384f
S
12.2880
16.9340
18.4320
512f
S
16.3840
22.5792
24.5760
32
44.1
48
TABLE I. System Clock Frequencies.
System Clock Pulse Width High
t
SCKH
t
SCKL
12ns
(min)
System Clock Pulse Width Low
12ns
(min)
t
SCKH
t
SCKL
1/256f
S
,1/384f
S
,or 1/512f
S
0.7V
"H"
SYSCLK
"L"
0.3V
DD
FIGURE 5. System Clock Timing.
1024 System Clock Periods
Reset
Reset Removal
4.4V
4.0V
3.6V
V
DD
Internal Reset
System Clock
FIGURE 6. Internal Power-On Reset Timing.
1024 System Clock Periods
Reset
Reset Removal
System Clock
Internal Reset
RSTB-pin
t
RST
t
RST
= 40ns minimum
FIGURE 7. External Forced Reset Timing.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCM4104 | High-Performance, 24-Bit, 216kHz sampling, Four-channel Audio Digital-to-Analog Converter |
| PCM4104PFBR | High-Performance, 24-Bit, 216kHz sampling, Four-channel Audio Digital-to-Analog Converter |
| PCM4104PFBT | High-Performance, 24-Bit, 216kHz sampling, Four-channel Audio Digital-to-Analog Converter |
| PCM58J | Precision, 18-Bit Monolithic Audio DIGITAL-TO-ANALOG CONVERTER |
| PCM58K | Precision, 18-Bit Monolithic Audio DIGITAL-TO-ANALOG CONVERTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCM3002/PCM3003 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:PCM3002. PCM3003 - 16-/20-Bit Single-Ended Analog Input/Output SoundPlus STEREO AUDIO CODECs |
| PCM3002_07 | 制造商:BB 制造商全稱(chēng):BB 功能描述:16/20-BIT SINGLE-ENDED ANALOG INPUT/OUTPUT STEREO AUDIO CODECS |
| PCM3002E | 功能描述:接口—CODEC 16/20-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類(lèi)型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類(lèi)型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PCM3002E | 制造商:Texas Instruments 功能描述:AUDIO CODEC IC 制造商:Texas Instruments 功能描述:IC, AUDIO CODEC, 20BIT, 48KHZ, SSOP-24 |
| PCM3002E/2K | 功能描述:接口—CODEC 16/20-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類(lèi)型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類(lèi)型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。