參數(shù)資料
型號: PCM1719E
英文描述: Stereo Audio DIGITAL-TO-ANALOG CONVERTER
中文描述: 立體聲音頻數(shù)字模擬轉(zhuǎn)換器
文件頁數(shù): 12/15頁
文件大?。?/td> 218K
代理商: PCM1719E
12
PCM1719
POWER SUPPLY
CONNECTIONS
PCM1719 has two power supply connections: digital (V
DD
)
and analog (V
CC
). Each connection also has a separate
ground. If the power supplies turn on at different times, there
is a possibility of a latch-up condition. To avoid this condi-
tion, it is recommended to have a common connection
between the digital and analog power supplies. If separate
supplies are used without a common connection, the delta
between the two supplies during ramp-up time must be less
than 0.6V.
An application circuit to avoid a latch-up condition is shown
in Figure 8.
FIGURE 9. 5-Level
Σ
Modulator Block Diagram.
A block diagram of the 5-level delta-sigma modulator is
shown in Figure 9. This 5-level delta-sigma modulator has
the advantage of stability and clock jitter sensitivity over the
typical one-bit (2 level) delta-sigma modulator.
The combined oversampling rate of the delta-sigma modu-
lator and the internal 8-times interpolation filter is 48f
S
for
a 384f
S
system clock, and 64f
S
for a 256f
S
system clock. The
theoretical quantization noise performance of the 5-level
delta-sigma modulator is shown in Figure 10.
FIGURE 10. Quantization Noise Spectrum.
3rd ORDER
Σ
MODULATOR
Frequency (kHz)
G
20
0
–20
–40
–60
–80
–100
–120
–140
–160
0
5
10
15
20
25
Out
48f
S
(384f
S
)
64f
S
(256f
S
)
In
8f
18-Bit
+
+
+
4
3
2
1
0
5-level Quantizer
+
+
Z
–1
+
+
Z
–1
+
+
Z
–1
THEORY OF OPERATION
The delta-sigma section of PCM1719 is based on a 5-level
amplitude quantizer and a 3rd-order noise shaper. This
section converts the oversampled input data to 5-level delta-
sigma format.
FIGURE 8. Latch-up Prevention Circuit.
DGND
AGND
V
DD
V
CC
Digital
Power Supply
Analog
Power Supply
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PCM1720 制造商:BB 制造商全稱:BB 功能描述:Stereo Audio DIGITAL-TO-ANALOG CONVERTER MPEG2/AC-3 COMPATIBLE