參數(shù)資料
型號(hào): PCL-818L
廠商: Electronic Theatre Controls, Inc.
英文描述: High-performance DAS card with programmable gain
中文描述: 高性能DAS的可編程增益卡
文件頁數(shù): 33/74頁
文件大小: 546K
代理商: PCL-818L
Chapter 4 Register structure and format
29
A/D data registers BASE+0/1
Two read-only registers at BASE+0 and BASE+1 hold A/D conver-
sion data. The 12 bits of data from the conversion are stored in
BASE+1 bit 7 to bit 0 and BASE+0 bit 7 to bit 4. BASE+0 bits 3 to 0
store the source A/D channel number.
BASE+0 (read only) A/D low byte and channel number
Bit
D7
D6
D5
Value
AD3
AD2
AD1
D4
AD0
D3
C3
D2
C2
D1
C1
D0
C0
BASE+1 (read only) A/D high byte
Bit
D7
D6
Value
AD11
AD10
D5
AD9
D4
AD8
D3
AD7
D2
AD6
D1
AD5
D0
AD4
AD11 to AD0
Analog to digital data.
AD0 is the least significant bit (LSB) of the A/D
data, and AD11 is the most significant bit (MSB).
C3 to C0
A/D channel number from which the data is derived.
C3 is the MSB and C0 is the LSB.
Software A/D trigger BASE+0
You can trigger an A/D conversion from software, the card's on-board
pacer or an external pulse. Bits 1 and 0 of register BASE+9 (shown
on page 34) select the trigger source. If you select software trigger-
ing, a write to the register BASE+0 with any value will trigger an
A/D conversion.
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