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參數(shù)資料
| 型號： | PCI-PIO |
| 英文描述： | KARTE E/A 48 KANAL PCI BUS |
| 中文描述： | KARTE E / A值48卡納爾PCI總線 |
| 文件頁數(shù)： | 19/24頁 |
| 文件大?。?/td> | 81K |
| 代理商： | PCI-PIO |
Chapter 3
Programming Details
Page 13
Blue Chip Technology Ltd.
01270187.doc
Page 13
Interrupt Selection
A total of seven sources of interrupt are available from the two PIO devices and
the counter/timers. These interrupts are summarised below:-
INT1 (AC0) is available when PIO1 is operating in mode 1. It provides a
Read Request interrupt for input operations or a Write Request interrupt for
output operations on PIO1 port A (PAA[0:7]).
INT2 (AC3) is available when PIO1 is operating in mode 1. It provides a
Read Request interrupt for input operations or a Write Request interrupt for
output operations on PIO1 port B (PAB[0:7]).
INT3 (BC0) is available when PIO2 is operating in mode 1. It provides a
Read Request interrupt for input operations or a Write Request interrupt for
output operations on PIO2 port A (PBA[0:7]).
INT4 (BC3) is available when PIO2 is operating in mode 1. It provides a
Read Request interrupt for input operations or a Write Request interrupt for
output operations on PIO2 port B (PBB[0:7]).
INT5 is the output from Counter/timer 0, and may be used to generate
interrupts on timed events.
INT6 is the output from Counter/timer 1, and may be used to generate
interrupts on timed events.
INT7 is the output from Counter/timer 2, and may be used to generate
interrupts on timed events.
The use of interrupts is not essential but greatly enhances the functionality of
the card.
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