參數(shù)資料
型號： PCI-DIO
英文描述： KARTE E/A 32 KANAL PCI BUS
中文描述： KARTE E / A值32卡納爾PCI總線
文件頁數(shù)： 14/21頁
文件大?。?/td> 83K
代理商： PCI-DIO
Chapter 3
Programming Details
Page 10
01270192.doc
The enable inputs and the destination of the outputs of the i8254 counter are
selected using the Counter Input Select Register B at Base + 3 (Hex), as shown
below:-
Counter Input Select Register B (Base + 3)
Bit no.
b7
Function
0 = Interrupt on counter out low
1 = Interrupt on counter out high
0 = Interrupt on counter out low
1 = Interrupt on counter out high
0 = Bit 15 data output buffer
1 = Counter/timer 2 output
0 = Bit 14 data output buffer
1 = Counter/timer 1 output
0 = Bit 13 data output buffer
1 = Counter/timer 0 output
0 = Permanently enabled
1 = IN6 input line
0 = Permanently enabled
1 = IN4 input line
0 = Permanently enabled
1 = IN2 input line
Counter 2 interrupt level:-
b6
Counter 1 interrupt level:-
b5
Output 16 source
b4
Output 15 source
b3
Output 14 source
b2
Counter 2 enable source:-
b1
Counter 1 enable source:-
b0
Counter 0 enable source:-
One or more of the counter timer outputs may be made available to the user at
Digital Outputs 14 to 16.
It should be noted that the 2.4 mS latency between the counter/timer output
changing state and the output pin reflecting that change will still exist, so the
accuracy of the output time periods generated cannot be guaranteed to be better
than this delay.
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