參數(shù)資料
型號: PCI-DIO
英文描述: KARTE E/A 32 KANAL PCI BUS
中文描述: KARTE E / A值32卡納爾PCI總線
文件頁數(shù): 10/21頁
文件大小: 83K
代理商: PCI-DIO
Chapter 3
Programming Details
Page 6
01270192.doc
CHAPTER 3
PROGRAMMING DETAILS
This chapter provides details of the cards internal registers.
Address Map
The address map for the PCI-DIO occupies a 12-byte block of addresses.
All the following addresses are relative to PCI base address register 2, located at
address 18 (hex) in the PCI configuration space.
ADDRESS
FUNCTION
Data
width
Byte
Byte
Byte
Byte
Word
Word
Byte
Byte
Byte
Byte
READ/
WRITE
R/W
R
W
W
W
R
R/W
R/W
R/W
W
Base + 0
Base + 1
Base +2
Base + 3
Base + 4
Base + 6
Base + 8
Base + 9
Base + A
Base + B
Interrupt enable register
Interrupt status register
Counter Input Select Register A
Counter Input Select Register B
Data output buffer
Data input buffer
Counter/timer 0 Count Register
Counter/timer 1 Count Register
Counter/timer 2 Count Register
Counter/timer Control Register
Digital Outputs
By writing a byte or word to the Data Output Buffer (word write to base + 4),
the digital outputs may be controlled. A logic 1 written to the register causes the
open collector output to turn on, and pull the output low. Consequently there is
a logic inversion through the digital outputs of the card.
Bit 0 (LSbit) of the Data Output Buffer controls Digital Output 1, and bit 15
(MSbit) controls Digital Output 16.
It should be noted that there is a latency of 2.4 mS between writing to the
output buffer and the output changing state.
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