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參數(shù)資料
| 型號： | PCF8549 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 65 x 102 pixels matrix LCD driver |
| 中文描述： | 65 × 102像素矩陣LCD驅(qū)動器 |
| 文件頁數(shù)： | 5/36頁 |
| 文件大?。?/td> | 271K |
| 代理商： | PCF8549 |
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1997 Nov 21
5
Philips Semiconductors
Product specification
65
×
102 pixels matrix LCD driver
PCF8549
T1, T2, T3, T4, T5, T6
AND
T7:
TEST PADS
T1, T3, T4, T5, T6 and T7 must be connected to V
SS1
, T2
is to be left open. Not accessible to user.
SDA/SDA_OUT: I
2
C D
ATA LINES
Output and input are separated. If both pads are
connected together they behave like a standard I
2
C pad.
SCL: I
2
C
CLOCK SIGNAL
Input for the I
2
C-bus clock signal.
SA0: S
LAVE ADDRESS
With the SA0 pin two different slave addresses can be
selected. That allows to connect two PCF8549 LCD
drivers to the same I
2
C-bus.
OSC:
OSCILLATOR
When the on-chip oscillator is used this input must be
connected to V
DD1
. An external clock signal, if used, is
connected to this input.
RES:
RESET
This signal will reset the device. Signal is active low.
FUNCTIONAL DESCRIPTION
Block diagram functions
O
SCILLATOR
The on-chip oscillator provides the clock signal for the
display system. No external components are required and
the OSC input must be connected to V
DD1
. An external
clock signal, if used, is connected to this input.
I
2
C I
NTERFACE
The I
2
C interface receives and executes the commands
sent via the I
2
C-bus. It also receives RAM-data and sends
them to the RAM. During read access the 8-bit parallel
data or the status register content is converted to a serial
data stream and output via the I
2
C-bus.
D
ISPLAY CONTROL LOGIC
The display control logic generates the control signals to
read out the RAM via the 101 bit parallel port. It also
generates the control signals for the row, and
column drivers.
D
ISPLAY DATA
RAM (DDRAM)
The PCF8549 contains a 65
×
102 bit static RAM which
stores the display data. The RAM is divided into 8 banks of
102 bytes and one bank of 102 bits
((8
×
8 + 1)
×
102 bits). During RAM access, data is
transferred to the RAM via the I
2
C interface. There is a
direct correspondence between X-address and column
output number.
T
IMING GENERATOR
The timing generator produces the various signals
required to drive the internal circuitry. Internal chip
operation is not disturbed by operations on the I
2
C-bus.
LCD
ROW AND COLUMN DRIVERS
The PCF8549 contains 65 row and 102 column drivers,
which connect the appropriate LCD bias voltages to the
display in accordance with the data to be displayed.
Figure 2 shows typical waveforms. Unused outputs should
be left unconnected.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCF8549U | 65 x 102 pixels matrix LCD driver |
| PCF8558 | Universal LCD driver for small graphic panels(應(yīng)用于小型圖形面板的通用LCD驅(qū)動器) |
| PCF8558U | Universal LCD driver for small graphic panels |
| PCF8563 | Real-time clock/calendar(實(shí)時(shí)時(shí)鐘/日歷) |
| PCF8566 | Universal LCD driver for low multiplex rates |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCF8549U | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:65 x 102 pixels matrix LCD driver |
| PCF8549U/2 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:65 x 102 pixels matrix LCD driver |
| PCF8549U/2/F1 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:65 x 102 pixels matrix LCD driver |
| PCF8551ATT/AJ | 功能描述:IC LCD DRIVER UNIV 48TSSOP 制造商:nxp usa inc. 系列:- 包裝:剪切帶（CT） 零件狀態(tài):在售 顯示類型:LCD 配置:7段 + DP，14段 + DP + AP，點(diǎn)陣 接口:I2C 數(shù)字或字符:9 個(gè)字符，18 個(gè)字符，144 元件 電流 - 電源:1.2μA 電壓 - 電源:1.8 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商器件封裝:48-TSSOP 標(biāo)準(zhǔn)包裝:1 |
| PCF8551BTT/AJ | 功能描述:IC LCD DRIVER UNIV 48TSSOP 制造商:nxp usa inc. 系列:* 包裝:剪切帶（CT） 零件狀態(tài):在售 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商器件封裝:48-TSSOP 標(biāo)準(zhǔn)包裝:1 |
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