- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367818 > PCF8531 (NXP Semiconductors N.V.) 34×128 pixel matrix driver(34×128 像素矩陣驅(qū)動器) PDF資料下載
參數(shù)資料
| 型號： | PCF8531 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 34×128 pixel matrix driver(34×128 像素矩陣驅(qū)動器) |
| 中文描述： | 34 × 128像素矩陣驅(qū)動器（34 × 128像素矩陣驅(qū)動器） |
| 文件頁數(shù)： | 6/44頁 |
| 文件大?。?/td> | 212K |
| 代理商： | PCF8531 |
第1頁第2頁第3頁第4頁第5頁當(dāng)前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁
2000 Feb 11
6
Philips Semiconductors
Product specification
34
×
128 pixel matrix driver
PCF8531
Notes
1.
2.
3.
If the on-chip oscillator is used, this input must be connected to V
DD1
.
If the internal V
LCD
generation is used, V
LCDOUT
, V
LCDIN
and V
LCDSENSE
must be connected together.
If an external V
LCD
is used in the application, then pin V
LCDOUT
must be left open circuit, otherwise the chip will be
damaged.
If only the internal Power-on reset is used, this input must be connected to V
DD1
.
V
DD1
is for the logic supply, V
DD2
, and V
DD3
are for the voltage multiplier. For split power supplies, V
DD2
and V
DD3
must be connected together. If only one supply voltage is available, V
DD1,
V
DD2
and V
DD3
must be connected
together.
Serial data acknowledge for the I
2
C-bus. By connecting SDACK to SDA externally, the SDA line becomes fully
I
2
C-bus compatible. Having the acknowledge output separated from the serial data line is advantageous in
Chip-On-Glass (COG) applications. In COG applications where the track resistance from the SDACK pad to the
system SDA line can be significant, a potential divider is generated by the bus pull-up resistor and the Indium Tin
Oxide (ITO) track resistance. It is possible that the PCF8531 will not be able to create a valid logic 0 level during the
acknowledge cycle. By splitting the SDA input from the SDACK output, the device could be used in a mode that
ignores the acknowledge bit. In COG applications where the acknowledge cycle is required, it is necessary to
minimize the track resistance from the SDACK pad to the system SDA line to guarantee a valid LOW level.
If ENR is connected to V
SS
, Power-on reset is disabled; to enable Power-on reset ENR should be connected to V
DD1
.
In the application, this input must be connected to V
SS
.
V
SS1
and V
SS2
must be connected together.
10. In the application, T2 must be left open circuit.
4.
5.
6.
7.
8.
9.
C0 to C127
R33
R31
R29
R27
R25
R23
R21
R19
R17
R15
R13
R11
R9
R7
R5
R3
R1
104 to 231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
LCD column driver outputs
LCD row driver output; icon row
LCD row driver output
LCD row driver output
LCD row driver output
LCD row driver output
LCD row driver output
LCD row driver output
LCD row driver output
LCD row driver output
LCD row driver output
LCD row driver output
LCD row driver output
LCD row driver output
LCD row driver output
LCD row driver output
LCD row driver output
LCD row driver output
SYMBOL
PAD
DESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCF8533 | Universal LCD driver for low multiplex rates |
| PCF8535 | 65 x 133 pixel matrix driver |
| PCF8535U | 65 x 133 pixel matrix driver |
| PCF8548 | 65 x 102 pixels matrix LCD driver |
| PCF8549 | 65 x 102 pixels matrix LCD driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCF8531_1008 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:34 x 128 pixel matrix driver |
| PCF8531_11 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:34 x 128 pixel matrix driver Single-chip LCD controller and driver |
| PCF8531U | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LCD Display Driver |
| PCF8531U/2 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:34 x 128 pixel matrix driver |
| PCF8531U/2/F1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LCD Display Driver |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。