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參數(shù)資料
| 型號(hào)： | PCE84C487 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Microcontrollers for digital auto-sync and VST TV controller applications |
| 中文描述： | 微控制器的數(shù)字自動(dòng)同步和VST電視控制器的應(yīng)用 |
| 文件頁(yè)數(shù)： | 17/36頁(yè) |
| 文件大?。?/td> | 168K |
| 代理商： | PCE84C487 |
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1996 Feb 21
17
Philips Semiconductors
Objective specification
Microcontrollers for digital auto-sync and
VST TV controller applications
PCE84C486; PCE84C487
8
ANALOG-TO-DIGITAL CONVERTER (ADC)
The two-channel ADC comprises a 4-bit Digital-to-Analog
Converter (DAC); a comparator; an analog channel
selector and control circuitry. As the digital input to the 4-bit
DAC is loaded by software (a subroutine in the program),
it is known as a software ADC. The block diagram is shown
in Fig.15.
The ADC inputs ADC1 and ADC2 share the same pins as
Derivative Port lines DP11 and DP12 respectively.
Selection of the pin function as either an ADC input or as
a Derivative Port line is achieved using bits ADCE1 and
ADCE2 in Register 22. When ADCEn = 1, the ADC
function is enabled.
The 4-bit DAC analog output voltage (V
ref
) is determined
by the decimal value of the data held in bits DAC0 to DAC3
of Register 20. V
ref
is calculated as shown in Equation (3)
and Table 4 lists the V
ref
values assuming V
DD
= 5 V.
V
16
(3)
When the analog input voltage is higher than V
ref
, the
COMP bit in Register 20 will be HIGH.
Table 4
Selection of V
ref
DAC3
DAC2
DAC1
DAC0
V
ref
(V)
0.3125
0.6250
0.9375
1.2500
1.5625
1.8750
2.1875
2.5000
2.8125
3.1250
3.4375
3.7500
4.0625
4.3750
4.6875
5.0000
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
V
ref
----------
DAC value
1
+
(
)
×
=
The ADC channel selector is controlled by the ADCS1 and
ADCS0 bits in Register 20. The channels are selected as
shown in Table 5.
Table 5
Selection of ADC channel
8.1
Conversion algorithm
There are many algorithms available to achieve the ADC
conversion. The algorithm described below and shown in
Fig.16 uses an iteration process.
1.
Enable and then select the ADC channel for
conversion. Channel selection is achieved using bits
ADCS1 and ADCS0 in Register 20.
2.
Set the digital input to the DAC to 1000. The digital
input to the DAC is selected using bits DAC3 to DAC0
in Register 20.
3.
Determine the result of the compare operation. This is
achieved by reading the COMP bit in Register 20
using the instruction MOV A, D20H. If COMP = 1; the
analog input voltage is higher than the reference
voltage (V
ref
). If COMP = 0; the analog input voltage is
lower than the reference voltage (V
ref
).
4.
If COMP = 1; then the analog input voltage is higher
than the reference voltage (V
ref
) and therefore the
digital input to the DAC needs to be increased. Set the
input to the DAC to 1100.
5.
If COMP = 0; then the analog input voltage is lower
than the reference voltage (V
ref
) and therefore the
digital input to the DAC needs to be decreased. Set the
input to the DAC to 0100.
6.
Determine the result of the compare operation by
reading the COMP bit in Register 20.
ADCS1
ADCS0
CHANNEL SELECTED
0
0
1
1
0
1
0
1
not allowed
ADC1
ADC2
not allowed
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