參數(shù)資料
型號: PCD5096
廠商: NXP Semiconductors N.V.
元件分類: Codec
英文描述: Universal codec
中文描述: 通用編解碼器
文件頁數(shù): 12/52頁
文件大小: 222K
代理商: PCD5096
1997 Jan 22
12
Philips Semiconductors
Preliminary specification
Universal codec
PCD5096
8.3
Control registers organization
8.3.1
C
ONTROL REGISTER ASSIGNMENT
The control register address assignment in the PCD5096 is shown in Table 3.
Table 3
Control register map
REGISTER
REGISTER
MNEMONIC
SIZE
(BITS)
ADDRESS
(HEX)
RESET STATE
(HEX)
FUNCTION
Control Register 0
CR0
16
78
0000
control signals for codecs, codec test
modes, Power-down control and disable
phase correction
IOM control
gain setting of analog-to-digital (A/D) and
digital-to-analog (D/A) paths
reference voltage setting of Codec 1 and
Codec 2
selection of the DSP modes
control of I/O pin IO0
control of I/O pin IO1
Control Register 1
Control Register 2
CR1
CR2
3
16
79
7A
00
0000
Control Register 3
CR3
16
7B
A0A0
Control Register 4
Control Register 5
Control Register 6
CR4
CR5
CR6
16
2
2
7C
7D
7E
0000
02
02
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