參數(shù)資料
型號(hào): PCA9560
廠商: NXP Semiconductors N.V.
元件分類: DRAM
英文描述: The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
中文描述: 該CAT24FC02是一個(gè)2 KB的EEPROM的國(guó)內(nèi)256個(gè)8位每字舉辦的串行CMOS
文件頁(yè)數(shù): 6/17頁(yè)
文件大?。?/td> 111K
代理商: PCA9560
Philips Semiconductors
Product data
PCA9560
Dual 5-bit multiplexed 1-bit latched
I
2
C EEPROM DIP switch
2003 Jun 27
6
CONVERSION FROM THE PCA9559 TO THE PCA9560
The PCA9560 is a drop in replacement to the PCA9559 with no software modifications. The PCA9559 has only one MUX_SELECT pin to
choose between the MUX_IN values and the single non-volatile register. Since the PCA9560 has two internal non-volatile registers, if Register 1
is left to all 0’s (default condition) then the MUX_SELECT_1 pin can function the same as the PCA9559 OVERRIDE # pin and MUX_SELECT_0
pin can function the same as the PCA9559 MUX_IN pin.
The PCA9560 can read the MUX_IN_X values via I
2
C that the PACA9559 cannot do. Another difference is that the MUX_SELECT_X control
pins can be overridden by I
2
C. To replace the PCA9559 with the PCA9560, the function table for the MUX_OUT outputs and the
NON_MUXED_OUT output must stay the same and the MUX_SELECT pin functions should not be overridden by I
2
C.
EXTERNAL CONTROL SIGNALS
The Write Protect (WP) input is used to control the ability to write the content of the non-volatile registers. If the WP signal is logic 0, the I
2
C bus
will be able to write the contents of the non-volatile registers. If the WP signal is logic 1, data will not be allowed to be written into the
non-volatile registers. In this case, the slave address and the command code will be acknowledged but the following data bytes will not be
acknowledged and the EEPROM is not updated.
The factory default for the contents of the non-volatile register are all logic 0. These stored values can be read or written using the I
2
C-bus
(described in the next section).
The WP, MUX_IN*, MUX_SELECT_0, and MUX_SELECT_1 signals have internal pull-up resistors. See the DC and AC Characteristics for
hysteresis and signal spike suppression figures.
Function Table
1
WP
MUX_SELECT_0
MUX_SELECT_1
COMMANDS
0
X
X
Write to the non-volatile registers through I
2
C bus allowed
Write to the non-volatile registers through I
2
C bus not
allowed
1
X
X
X
0
1
MUX_OUT and NON_MUXED_OUT (transparent) from
EEPROM byte 0
X
0
0
MUX_OUT and NON_MUXED_OUT (transparent) from
EEPROM byte 1
X
1
1
MUX_OUT from MUX_IN inputs and NON_MUXED_OUT
latched (from EEPROM 0)
X
1
0
MUX_OUT from MUX_IN inputs and NON_MUXED_OUT
latched (from EEPROM 1)
NOTE:
1. This table is valid when not overridden by I
2
C control register.
POWER-ON RESET (POR)
When power is applied to V
DD
, an internal power-on reset holds the PCA9560 in a reset state until V
DD
has reached V
POR
. At that point, the
reset condition is released and the PCA9560 volatile registers and I
2
C/SMBus state machine will initialize to their default states.
The MUX_OUT and NON_MUXED_OUT pin values depend on:
-
the MUX_SELECT_0 and MUX_SELECT_1 logic levels, selecting either the MUX_IN input pins or one of the two 6-bit EEPROMs
-
the previously stored values in the EEPROM registers/current MUX_IN pin values as shown in the Function Table
相關(guān)PDF資料
PDF描述
PCA9560D The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
PCB2032V EEPROM
PCB2320DP ISDN Line Interface
PCB2325DP ISDN Line Interface
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