參數(shù)資料
型號: PCA9500
廠商: NXP Semiconductors N.V.
元件分類: DRAM
英文描述: The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
中文描述: 該CAT24FC02是一個2 KB的EEPROM的國內(nèi)256個8位每字舉辦的串行CMOS
文件頁數(shù): 5/23頁
文件大?。?/td> 169K
代理商: PCA9500
Philips Semiconductors
Product data sheet
PCA9500
8-bit I
2
C and SMBus I/O port with 2-kbit EEPROM
2004 Sep 30
5
CONTROL REGISTER
The PCA9500 contains a single 8-bit register called the Control Register, which can be written and read via the I
2
C-bus. This register is sent
after a successful acknowledgment of the slave address.
It contains the I/O operation information.
I/O OPERATIONS (see also Figure 4)
Each of the PCA9500’s eight I/Os can be independently used as an input or output. Output data is transmitted to the port by the I/O WRITE
mode (see Figure 6). Input I/O data is transferred from the port to the microcontroller by the READ mode (See Figure 7).
S
0
1
0
0
A2
A1
A0
0
A
DATA 1
A
DATA 2
A
SDA
SCL
tpv
1
2
3
4
5
6
7
8
tpv
DATA 2 VALID
DATA 1 VALID
SW00548
ACKNOWLEDGE
FROM SLAVE
R/W
START CONDITION
ACKNOWLEDGE
FROM SLAVE
ACKNOWLEDGE
FROM SLAVE
SLAVE ADDRESS (I/O EXPANDER)
DATA TO PORT
DATA TO PORT
WRITE TO
PORT
DATA OUT
FROM PORT
Figure 6. I/O WRITE mode (output)
S
0
1
0
0
A2
A1
A0
1
A
DATA 1
A
DATA 4
1
SDA
tph
tps
DATA 4
P
DATA 2
DATA 3
SW00549
SLAVE ADDRESS (I/O EXPANDER)
DATA FROM PORT
DATA FROM PORT
READ FROM
PORT
DATA INTO
PORT
START CONDITION
ACKNOWLEDGE
FROM SLAVE
R/W
ACKNOWLEDGE
FROM MASTER
STOP
CONDITION
DATA 1
Figure 7. I/O READ mode (input)
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