參數(shù)資料
型號(hào): PC56F8006VWL
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 56/106頁(yè)
文件大?。?/td> 0K
描述: DSP 16BIT 28-SOIC
標(biāo)準(zhǔn)包裝: 26
系列: 56F8xxx
核心處理器: 56800
芯體尺寸: 16-位
速度: 32MHz
連通性: I²C,LIN,SCI,SPI
外圍設(shè)備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 23
程序存儲(chǔ)器容量: 16KB(8K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 1K x 16
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 15x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
包裝: 管件
Specifications
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
Freescale Semiconductor
53
8.7
Flash Memory Characteristics
8.8
External Clock Operation Timing
Figure 21. External Clock Timing
Table 23. Flash Timing Parameters
Characteristic
Symbol
Min
Typ
Max
Unit
Program time1
1 There is additional overhead that is part of the programming sequence. See the MC56F8006 Peripheral Reference
Manual for detail.
tprog
20
40
s
Erase time 2
2 Specifies page erase time. There are 512 bytes per page in the program flash memory.
terase
20
ms
Mass erase time
tme
100
ms
Table 24. External Clock Operation Timing Requirements1
1 Parameters listed are guaranteed by design.
Characteristic
Symbol
Min
Typ
Max
Unit
Frequency of operation (external clock driver)2
2 See Figure 21 for detail on using the recommended connection of an external clock driver.
fosc
——
64
MHz
Clock pulse width3
3 The chip may not function if the high or low pulse width is smaller than 6.25 ns.
tPW
6.25
ns
External clock input rise time4
4 External clock input rise time is measured from 10% to 90%.
trise
——
3
ns
External clock input fall time5
5 External clock input fall time is measured from 90% to 10%.
tfall
——
3
ns
Input high voltage overdrive by an external clock
Vih
0.85VDD
——
V
Input high voltage overdrive by an external clock
Vil
——
0.3VDD
V
90%
50%
10%
90%
50%
10%
External
Clock
tPW
tfall
trise
VIL
VIH
Note: The midpoint is VIL + (VIH – VIL)/2.
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