參數(shù)資料
型號: P89V52X2FA,512
廠商: NXP Semiconductors
文件頁數(shù): 16/57頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 8K 44-PLCC
產品培訓模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標準包裝: 1,300
系列: 89V
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: UART/USART
外圍設備: POR
輸入/輸出數(shù): 32
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
EEPROM 大小: 192 x 8
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
產品目錄頁面: 706 (CN2011-ZH PDF)
配用: 622-1017-ND - BOARD 44-ZIF PLCC SOCKET
622-1012-ND - BOARD FOR P89V52X2 44-TQFP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
622-1002-ND - USB IN-CIRCUIT PROG LPC9XX
其它名稱: 568-4249-5
935282528512
P89V52X2FA
P89V52X2_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 4 May 2009
23 of 57
NXP Semiconductors
P89V52X2
80C51 with 256 B RAM, 192 B data EEPROM
When a logic 0 is applied at pin T2EX this causes Timer 2 to count down. The timer will
underow when TL2 and TH2 become equal to the value stored in RCAP2L and
RCAP2H. Timer 2 underow sets the TF2 ag and causes 0FFFFH to be reloaded into
the timer registers TL2 and TH2. The external ag EXF2 toggles when Timer 2 underows
or overows. This EXF2 bit can be used as a 17th bit of resolution if needed.
6.9.3 Programmable clock-out
A 50 % duty cycle clock can be programmed to come out on pin T2 (P1[0]). This pin,
besides being a regular I/O pin, has two additional functions. It can be programmed:
1. To input the external clock for Timer/Counter 2, or
2. To output a 50 % duty cycle clock ranging from 122 Hz to 8 MHz at a 16 MHz
operating frequency.
To congure the Timer/Counter 2 as a clock generator, bit C/T2 (in T2CON) must be
cleared and bit T2OE in T2MOD must be set. Bit TR2 (T2CON.2) also must be set to start
the timer.
The Clock-Out frequency depends on the oscillator frequency and the reload value of
Timer 2 capture registers (RCAP2H, RCAP2L) as shown in Equation 2:
(2)
Where (RCAP2H, RCAP2L) = the content of RCAP2H and RCAP2L taken as a 16-bit
unsigned integer.
In the Clock-Out mode Timer 2 rollovers will not generate an interrupt. This is similar to
when it is used as a baud rate generator.
6.9.4 Baud rate generator mode
Bits TCLK and/or RCLK in T2CON allow the UART transmit and receive baud rates to be
derived from either Timer 1 or Timer 2 (See Section 6.10 for details). When TCLK = 0,
Timer 1 is used as the UART transmit baud rate generator. When TCLK = 1, Timer 2 is
Fig 16. Timer 2 in Auto Reload mode (DCEN = 1)
002aaa525
TL2
(8-bits)
TH2
(8-bits)
TF2
EXF2
underflow
timer 2
interrupt
RCAP2L RCAP2H
FFH
overflow
(down-counting reload value)
(up-counting reload value)
count direction
1 = up
0 = down
T2EX pin
toggle
OSC
÷6
T2 pin
C/T2 = 0
C/T2 = 1
control
TR2
OscillatorFrequency
2
65536
RCAP2H RCAP2L
,
()
()
×
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