參數(shù)資料
型號: P89LPC9402FBD,557
廠商: NXP Semiconductors
文件頁數(shù): 17/60頁
文件大小: 0K
描述: IC 80C51 MCU FLASH 8K 64-LQFP
標準包裝: 450
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LCD,LED,POR,PWM,WDT
輸入/輸出數(shù): 23
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-LQFP
包裝: 托盤
其它名稱: 935288631557
P89LPC9402_1
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 22 April 2009
24 of 60
NXP Semiconductors
P89LPC9402
8-bit microcontroller with accelerated two-clock 80C51 core
Digital outputs are disabled by putting the port output into the Input-Only
(high-impedance) mode.
Digital inputs on Port 0 may be disabled through the use of the PT0AD register, bits 1:5.
On any reset, PT0AD[1:5] defaults to logic 0s to enable digital functions.
7.14.3 Additional port features
After power-up, all pins are in Input-Only mode. Please note that this is different from
the LPC76x series of devices.
After power-up, all I/O pins except P1.5, may be congured by software.
Pin P1.5 is input only. Pins P1.2 and P1.3 and are congurable for either input-only or
open-drain.
Every output on the P89LPC9402 has been designed to sink typical LED drive current.
However, there is a maximum total output current for all ports which must not be
exceeded. Please refer to Table 12 “Static electrical characteristics” for detailed
specications.
All ports pins that can function as an output have slew rate controlled outputs to limit noise
generated by quickly switching output signals. The slew rate is factory-set to
approximately 10 ns rise and fall times.
7.15 Power monitoring functions
The P89LPC9402 incorporates power monitoring functions designed to prevent incorrect
operation during initial power-up and power loss or reduction during operation. This is
accomplished with two hardware functions: Power-on detect and brownout detect.
7.15.1 Brownout detection
The brownout detect function determines if the power supply voltage drops below a
certain level. Enhanced brownout detection has 3 independent functions: BOD reset,
BOD interrupt and BOD FLASH.
BOD reset is always on except in total Power-down mode. It could not be disabled in
software. BOD interrupt may be enabled or disabled in software. BOD FLASH is always
on, except in Power-down modes and could not be disabled in software.
BOD reset and BOD interrupt, each has four trip voltage levels. BOE1 bit (UCFG1.5) and
BOE0 bit (UCFG1.3) are used as trip point conguration bits of BOD reset. BOICFG1 bit
and BOICFG0 bit in register BODCFG are used as trip point conguration bits of BOD
interrupt. BOD reset voltage should be lower than BOD interrupt trip point. BOD FLASH is
used for ash programming/erase protection and has only 1 trip voltage of 2.4 V. Please
refer to P89LPC9402
User manual for detail congurations.
If brownout detection is enabled the brownout condition occurs when VDD falls below the
brownout trip voltage and is negated when VDD rises above the brownout trip voltage.
For correct activation of brownout detect, the VDD rise and fall times must be observed.
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