參數(shù)資料
型號(hào): P89LPC9402FBD,557
廠商: NXP Semiconductors
文件頁(yè)數(shù): 12/60頁(yè)
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 8K 64-LQFP
標(biāo)準(zhǔn)包裝: 450
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LCD,LED,POR,PWM,WDT
輸入/輸出數(shù): 23
程序存儲(chǔ)器容量: 8KB(8K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-LQFP
包裝: 托盤
其它名稱: 935288631557
P89LPC9402_1
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 22 April 2009
2 of 60
NXP Semiconductors
P89LPC9402
8-bit microcontroller with accelerated two-clock 80C51 core
I Serial ash In-Circuit Programming (ICP) allows simple production coding with
commercial EPROM programmers. Flash security bits prevent reading of sensitive
application programs.
I Serial ash In-System Programming (ISP) allows coding while the device is mounted
in the end application.
I In-Application Programming (IAP) of the ash code memory. This allows changing the
code in a running application.
I Watchdog timer with separate on-chip oscillator, nominal 400 kHz, calibrated to ±5%,
requiring no external components. The watchdog prescaler is selectable from
eight values.
I High-accuracy internal RC oscillator option, with clock doubler option, allows operation
without external oscillator components. The RC oscillator option is selectable and ne
tunable.
I Switching on the y among internal RC oscillator, watchdog oscillator, external clock
source provides optimal support of minimal power active mode with fast switching to
maximum performance.
I Idle and two different power-down reduced power modes. Improved wake-up from
Power-down mode (a LOW interrupt input starts execution). Typical power-down
current is 1
A (total power-down with voltage comparators disabled).
I Active-LOW reset. On-chip power-on reset allows operation without external reset
components. A software reset function is also available.
I Congurable on-chip oscillator with frequency range options selected by user
programmed ash conguration bits. Oscillator options support frequencies from
20 kHz to the maximum operating frequency of 18 MHz.
I Oscillator fail detect. The watchdog timer has a separate fully on-chip oscillator
allowing it to perform an oscillator fail detect function.
I Programmable port output conguration options: quasi-bidirectional, open-drain,
push-pull, input-only.
I High current sourcing/sinking (20 mA) on eight I/O pins (P0.3 to P0.7, P1.4, P1.6,
P1.7). All other port pins have high sinking capability (20 mA). A maximum limit is
specied for the entire chip.
I Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of
the pins match or do not match a programmable pattern.
I Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns
minimum ramp times.
I Only power and ground connections are required to operate the P89LPC9402 when
internal reset option is selected.
I Four interrupt priority levels.
I Eight keypad interrupt inputs, plus two additional external interrupt inputs.
I Schmitt trigger port inputs.
I Second data pointer.
I Emulation support.
I LED drive capability (20 mA) on all port pins. A maximum limit is specied for the
entire chip.
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