參數(shù)資料
型號: P87CL881H
廠商: NXP Semiconductors N.V.
英文描述: Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM(帶63K字節(jié)OTP程序存儲器和2K字節(jié)RAM的低壓微控制器)
中文描述: 低63字節(jié)OTP程序存儲器和2K字節(jié)RAM電壓微控制器(帶檢察官辦公室63K字節(jié)程序存儲器和2K字節(jié)的RAM的低壓微控制器)
文件頁數(shù): 6/32頁
文件大?。?/td> 139K
代理商: P87CL881H
1999 Apr 16
6
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte
OTP program memory and 2-kbyte RAM
P87CL881H
5.2
Pin description
Table 1
LQFP package
SYMBOL
PIN
DESCRIPTION
V
DD
V
DDP
V
SS
V
SSP
RST
39
38
17
16
4
Power supply
for core.
Power supply
for I/O ring.
Ground
for core.
Ground
for I/O ring.
RESET.
A LOW level on this pin for two machine cycles while the oscillator is running,
resets the device. The RST pin is also an output which can be used to reset other ICs.
PORENABLE.
If set to a logic 1, the internal Power-on reset circuit is enabled. If external
reset circuitry is used, it is recommended to keep PORENABLE LOW in order to achieve
the lowest power consumption. This pin is also used for the OTP programming voltage
V
PP
.
Enable Watchdog Timer.
Crystal output.
Output of the amplitude controlled oscillator. If an external oscillator
clock is used this pin not used.
Crystal input.
Input to the amplitude controlled oscillator. Also the input for an externally
generated clock source.
Program Store Enable.
Read strobe to external program memory. When executing
code out of external program memory, PSEN is activated twice each machine cycle.
However, during each access to external data memory two PSEN activations are
skipped. During Power-down mode the PSEN pin stays HIGH.
Address Latch Enable.
Latches the low byte of the address during accesses to external
memory. It is activated every six oscillator periods and may be used for external timing or
clocking purposes. For improved EMC behaviour, the toggle of the ALE pin can be
disabled by setting the RFI bit in the PCON register by software. This bit is cleared on
reset and can be set and cleared by software. When set, the ALE pin will be pulled-down
internally, switching an external address latch to a quiet state. The MOVX instruction will
still toggle ALE if external memory is accessed. ALE will retain its normal HIGH state
during Idle mode and a LOW state during the Power-down mode while in the EMC mode.
Additionally, during internal access (EA = 1) ALE will toggle normally when the address
exceeds the internal program memory size. During external access (EA = 0) ALE will
always toggle normally, whether the RFI bit is set or not.
External Access.
When EA is held HIGH, the CPU executes out of the internal program
memory (unless the program counter exceeds the highest address for internal program
memory). When EA is held LOW, the CPU executes out of external program memory
regardless of the value of the program counter. The state of the EA pin is internally
latched at reset.
PORENABLE/V
PP
6
EW
XTAL2
28
14
XTAL1
15
PSEN
26
ALE
27
EA
29
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