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參數(shù)資料
| 型號： | P87CL881H |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM(帶63K字節(jié)OTP程序存儲器和2K字節(jié)RAM的低壓微控制器) |
| 中文描述： | 低63字節(jié)OTP程序存儲器和2K字節(jié)RAM電壓微控制器（帶檢察官辦公室63K字節(jié)程序存儲器和2K字節(jié)的RAM的低壓微控制器） |
| 文件頁數(shù)： | 11/32頁 |
| 文件大?。?/td> | 139K |
| 代理商： | P87CL881H |
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1999 Apr 16
11
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte
OTP program memory and 2-kbyte RAM
P87CL881H
Mode 1 Standard port; quasi-bidirectional I/O with
pull-up. The strong pull-up p1 is turned on for
only one oscillator periods after a LOW-to-HIGH
transition in the port latch. After these two
oscillator periods the port is only weakly driven
through p2 and ‘very weakly’ driven through p3.
See Fig.3b.
Mode 2 High-impedance; this mode turns all port output
drivers off. Thus, the pin will not source or sink
current and may be used as an input-only pin with
no internal drivers for an external device to
overcome. See Fig.3c.
Mode 3 Push-pull; output with drive capability in both
polarities. In this mode, pins can only be used as
outputs. See Fig.3d.
Tables 2 and 3 show the configuration register settings for
the four output configurations. The electrical
characteristics of each output configuration are specified
in Chapter 8. The default port configuration after reset is
given in Table 2.
In case of external memory access, the appropriate
options for ports P0, P2 and P3.6/P3.7 (WR/RD, only in
case of external data memory access) must be set by
software.
For Special Function Registers for port configurations/data
please refer to Table 2, note 1.
Table 3
Port configuration register settings
Note
1.
Mode changes may cause glitches to occur during transitions. When modifying both registers, write instructions
should be carried out consecutively.
MODE
(1)
PnCFGA
PnCFGB
PORT OUTPUT CONFIGURATION
NORMAL PORTS
I
2
C-BUS PORTS (P1.6 AND P1.7)
0
1
2
3
0
1
0
1
0
0
1
1
open-drain
quasi-bidirectional
high-impedance
push-pull
open-drain
open-drain
high-impedance
open-drain
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