參數(shù)資料
型號(hào): P4C1256L-70CMB
廠商: PYRAMID SEMICONDUCTOR CORP
元件分類(lèi): SRAM
英文描述: 32K X 8 STANDARD SRAM, 70 ns, CDIP28
封裝: 0.300 INCH, CERAMIC, SIDE BRAZED, DIP-28
文件頁(yè)數(shù): 7/16頁(yè)
文件大小: 1155K
代理商: P4C1256L-70CMB
W39L040
Publication Release Date: April 14, 2005
- 15 -
Revision A6
6.11 Software Product Identification and Boot Block Lockout Detection Flow Chart
Product
Identification
Entry (1)
Load data 55
to
address 2AAA
Load data 90
to
address 5555
Pause 10 S
Product
Identification
and Boot Block
Lockout
Dt ti
Mode (3)
Read address = 0000
data = DA
Read address = 0001
Read address=02/7FFF2
for Bottom/Top
data:in DQ0="1" or "0"
for 64K Boot Block
or DQ1="1" or "0"
for 16K Boot Block
(4)
Product
Identification Exit(6)
Load data
55
to
address 2AAA
Load data F0
to
address 5555
Normal Mode
(5)
(2)
Load data AA
to
address 5555
Load data AA
to
address 5555
Pause 10 S
data = B6
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