參數(shù)資料
型號(hào): P4C1256L-70CMB
廠商: PYRAMID SEMICONDUCTOR CORP
元件分類: SRAM
英文描述: 32K X 8 STANDARD SRAM, 70 ns, CDIP28
封裝: 0.300 INCH, CERAMIC, SIDE BRAZED, DIP-28
文件頁(yè)數(shù): 4/16頁(yè)
文件大?。?/td> 1155K
代理商: P4C1256L-70CMB
W39L040
- 12 -
6.7 Embedded Erase Algorithm
Start
Write Erase Command Sequence
(see below)
Erasure Completed
#Data Polling or Toggle
BitSuccessfully Completed
5555H/AAH
2AAAH/55H
5555H/80H
5555H/10H
Chip Erase Command Sequence
(Address/Command):
5555H/AAH
2AAAH/55H
5555H/80H
Sector Address/30H
(Address/Command):
5555H/AAH
2AAAH/55H
5555H/80H
Page Address/50H
Individual Page Erase
(Address/Command):
Individual Sector Erase
Command Sequence
Pause TEC /TSEC/TPEC
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