
6.6.3
6.6.4
6.7
6.7.1
6.7.2
6.8
6.8.1
6.8.2
6.9
6.9.1
6.9.2
6.9.3
6.9.4
6.10
6.10.1
6.10.2
6.10.3
6.10.4
6.10.5
6.10.6
6.10.7
6.11
6.11.1
6.11.2
6.11.3
6.11.4
6.11.5
6.11.6
6.11.7
6.11.8
6.11.9
6.11.10
MODEM DISABLE MASK ‘MDM’....................................................................................................................................44
6.11.11
READABLE FCR ‘RFC’...................................................................................................................................................45
6.11.12
GOOD-DATA STATUS REGISTER ‘GDS’ .....................................................................................................................45
6.11.13
DMA STATUS REGISTER ‘DMS’...................................................................................................................................45
6.11.14
PORT INDEX REGISTER ‘PIX’....................................................................................................................................... 45
6.11.15
CLOCK ALTERATION REGISTER ‘CKA’.......................................................................................................................45
6.11.16
MISC DATA REGISTER.................................................................................................................................................45
7
SERIAL EEPROM SPECIFICATION..........................................................................................................................46
7.1
EEPROM DATA ORGANISATION.....................................................................................................................................46
7.2
ZONE 0 : HEADER..............................................................................................................................................................46
7.3
ZONE1 : CARD INFORMATION STRUCTURE.................................................................................................................47
7.4
ZONE 2 : LOCAL REGISTER CONFIGURATION.............................................................................................................47
7.5
ZONE 3 : FUNCTION ACCESS (UART)............................................................................................................................ 48
8
OPERATING CONDITIONS...........................................................................................................................................49
9
DC ELECTRICAL CHARACTERISTICS...................................................................................................................50
9.1
5V OPERATION..................................................................................................................................................................50
9.2
3V OPERATION..................................................................................................................................................................51
10
TIMING WAVEFORMS / AC CHARACTERISTICS...........................................................................................52
10.1
COMMON MEMORY ACCESS...........................................................................................................................................52
10.2
ATTRIBUTE MEMORY ACCESS....................................................................................................................................... 53
10.3
I/O ACCESS........................................................................................................................................................................ 54
10.4
LOCAL BUS ACCESS........................................................................................................................................................55
Page 3
OXCF950 DATA SHEET V1.1
OXFORD SEMICONDUCTOR LTD.
INTERRUPT DESCRIPTION..........................................................................................................................................33
SLEEP MODE .................................................................................................................................................................34
MODEM INTERFACE.........................................................................................................................................................34
MODEM CONTROL REGISTER ‘MCR’..........................................................................................................................34
MODEM STATUS REGISTER ‘MSR’............................................................................................................................. 35
OTHER STANDARD REGISTERS.....................................................................................................................................35
DIVISOR LATCH REGISTERS ‘DLL & DLM’ .................................................................................................................35
SCRATCH PAD REGISTER ‘SPR’.................................................................................................................................35
AUTOMATIC FLOW CONTROL.........................................................................................................................................35
ENHANCED FEATURES REGISTER ‘EFR’...................................................................................................................35
SPECIAL CHARACTER DETECTION............................................................................................................................ 37
AUTOMATIC IN-BAND FLOW CONTROL.....................................................................................................................37
AUTOMATIC OUT-OF-BAND FLOW CONTROL...........................................................................................................37
BAUD RATE GENERATION...............................................................................................................................................37
GENERAL OPERATION.................................................................................................................................................37
CLOCK PRESCALER REGISTER ‘CPR’.......................................................................................................................38
TIMES CLOCK REGISTER ‘TCR’...................................................................................................................................38
INPUT CLOCK OPTIONS ...............................................................................................................................................39
TTL CLOCK MODULE ....................................................................................................................................................40
EXTERNAL 1X CLOCK MODE....................................................................................................................................... 40
CRYSTAL OSCILLATOR CIRCUIT................................................................................................................................40
ADDITIONAL FEATURES.................................................................................................................................................. 40
ADDITIONAL STATUS REGISTER ‘ASR’......................................................................................................................40
FIFO FILL LEVELS ‘TFL & RFL’.....................................................................................................................................41
ADDITIONAL CONTROL REGISTER ‘ACR’.................................................................................................................. 41
TRANSMITTER TRIGGER LEVEL ‘TTL’........................................................................................................................42
RECEIVER INTERRUPT. TRIGGER LEVEL ‘RTL’ ........................................................................................................ 42
FLOW CONTROL LEVELS ‘FCL & FCH’.......................................................................................................................42
DEVICE IDENTIFICATION REGISTERS .......................................................................................................................43
CLOCK SELECT REGISTER ‘CKS’...............................................................................................................................43
NINE-BIT MODE REGISTER ‘NMR’...............................................................................................................................43