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參數(shù)資料
| 型號： | OV6120 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | SINGLE-CHIP CMOS CIF COLOR DIGITAL CAMERA |
| 中文描述： | 單芯片CMOS到岸價格彩色數(shù)碼攝像機(jī) |
| 文件頁數(shù)： | 23/31頁 |
| 文件大小： | 341K |
| 代理商： | OV6120 |
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14 May 1999
Version 1.11
23
OV6620/OV6120
SINGLE IC CMOS COLOR AND B/W DIGITAL CAMERAS
O
MNI
V
ISION
T
ECHNOLOGIES
, Inc.
Advanc ed Information
Preliminary
3.
I
2
C Bus
Many of the functions and configuration registers in the
OV6620/OV6120 image sensors are available through
the I
2
C interface. The I
2
C port is enabled by asserting
the I2CB line (pin 12) through a 10K ohm resistor to
V
DD
. When the I
2
C capability is enabled (I2CB = 1), the
OV6620/OV6120 imager operates as a slave device
that supports up to 400 kbps serial transfer rate using a
7-bit address/data transfer protocol .
Figure 8. I
2
C Bus Protocol Format
S – START CONDITION
A – ACKNOWLEDGE BIT
P – STOP CONDITION
SLAVE ID - 110CCC0X
CS2 (PIN 35)
CS1 (PIN 37)
MSB
LSB=0
1ST BYTE
2ND BYTE
3RD BYTE
S
P
A
A
A
RW
SLAVE ID (7 BITS)
SUBADDRESS (8 BITS)
DATA (8 BITS)
START
STOP
ACK
MSB
LSB=1
1ST BYTE
2ND BYTE
3RD BYTE
S
P
A
A
RW
SLAVE ID (7 BITS)
START
STOP
ACK
DATA (8 BITS)
DATA (8 BITS)
MASTER TRANSMIT, SLAVE RECEIVE (WRITE CYCLE)
MASTER RECEIVE, SLAVE TRANSMIT (READ CYCLE)
– SLAVE TRANSMIT
– MASTER TRANSMIT
– MASTER INITIATE
NO ACK IN
LAST BYTE
ACK
1
MSB
LSB=0
1ST BYTE
2ND BYTE
S
P
A
A
RW
SLAVE ID (7 BITS)
SUBADDRESS (8 BITS)
START
STOP
ACK
MASTER TRANSMIT, SLAVE RECEIVE (DUMMY WRITE CYCLE)
X – RW BIT, 1: READ, 0:WRITE
CS0 (PIN 34)
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