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參數(shù)資料
| 型號(hào)： | ORLI10G-1BM680 |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 1296 CLBS, 380000 GATES, PBGA680 |
| 封裝： | PLASTIC, MULTILAYER, BGA-680 |
| 文件頁數(shù)： | 11/74頁 |
| 文件大?。?/td> | 1411K |
| 代理商： | ORLI10G-1BM680 |
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Agere Systems Inc.
19
Preliminary Data Sheet
March 2001
10 Gbits/s Transmit and Receive Line Interface
ORCA ORLI10G FPSC
ORLI10G Demultiplexer Detail
The demultiplexer module converts the incoming
16 bits of data at 622 MHz/666 MHz into 128 bits of
data at 78 MHz/83 MHz. It has been implemented in
two stages: the first stage converts each incoming bit
into a byte stream and the second stage bit interleaves
these bytes into 128 bits depending upon the mode of
operation. The low-speed clocks are generated by this
block. These clocks are then driven back to this block
from the low speed clock tree network. Functionally, the
demultiplexer architecture consists of three blocks; the
serial to parallel conversion, the counters, and the
interleaving.
The first stage of the line interface module (demulti-
plexer) converts each incoming bit of data into a byte
stream on a divided by 8 clock. The data is first regis-
tered on the rising edge of the clock input. The clock
dividers also runs parallel to data shift (serial to paral-
lel), on the rising edge of the input clock. An enable is
created when a complete byte is taken in. This enable
signal is used to register the serial-to-parallel con-
verted data at the high-speed input clock. This ensures
that the data can be safely transferred to the low-speed
clock. This data is then transferred to the divided clock
allowing a timing margin of approximately half the
divided clock period.
The high-speed demultiplexer converts the incoming
data as blocks of bytes. The byte boundaries of incom-
ing data are unknown and are irrelevant to this module.
This data is then interleaved to the 128/32 bits of output
data depending on the mode of operation (10G/2.5G).
In 10G mode, the output data is assigned the retimed
128 bits of data from the first stage of line interface reg-
istered at the input clock [0]. In 2.5G mode, the output
data is assigned four concatenated 32 bits of data from
the first stage of line interface registered at input clocks
[0 to 3]. The interleaving is done at bit level because
the serial-to-parallel converter operates on bits of
incoming data. In 10G mode, it is assumed that all the
incoming 16 bits of data are synchronized to the input
clock [0]. This block also generates the clock enables
used by the output line interface (multiplexer) module
for registering the data on the high-speed clock. These
enables along with the enables from other clocks are
selected through the high-speed clock MUX for the out-
put line interface block.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ORLI10G-1BM680C | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 10368 LUT 316 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| ORLI10G-1BM680I | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 10368 LUT 316 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| ORLI10G-1BMN680C | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 10368 LUT 316 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| ORLI10G-1BMN680I | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 10368 LUT 316 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| ORLI10G-2BM680C | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 10368 LUT 316 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
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