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參數(shù)資料

型號：	ORCAORT4622
英文描述：	Field-Programmable System Chip (FPSC) Four-Channel x 622 Mbits/s Backplane Transceiver
中文描述：	現(xiàn)場可編程系統(tǒng)芯片（促進(jìn)文化基金）四通道x 622 Mbits /秒背板收發(fā)器
文件頁數(shù)：	16/90頁
文件大?。?/td>	1915K
代理商：	ORCAORT4622

Lucent Technologies Inc.

ORCAORT4622 FPSC

Four-Channel x 622 Mbits/s Backplane Transceiver

Preliminary Data Sheet

March 2000

Backplane Transceiver Core Detailed

Description

(continued)

Transport Overhead for In Band Communication

The TOH byte can be used for In Band configuration,

service, and management since it is carried along the

same channel as data. In ORT4622, In Band signaling

can be efficiently utilized, since the total cost of over-

head is only 3.3%.

Transport Overhead Insertion (Serial Link)

The TOH serial links are used to insert TOH bytes into

the transmit data. The transmit TOH data and

TOH_CLK_EN get retimed by TOH_CLK in order to

meet setup and hold specifications of the device.

The retimed TOH data is shifted into a 288-bit (36-byte

by 8-bit) shift register and then multiplexed as an 8-bit

bus to be inserted into the byte-wide data stream.

Insertion from these serial links or pass-through of

TOH from the byte-wide data is under software control.

Transport Overhead Byte Ordering

(FPGA to Backplane)

In the transparent mode, SPE and TOH data received

on parallel input bus is transferred, unaltered, to the

serial LVDS output. However, B1 byte of STS#1 is

always replaced with a new calculated value (the 11

bytes following B1 are replaced with all zeros). Also,

A1 and A2 bytes of all STS-1s are always regenerated.

TOH serial port in not used in the transparent mode of

operation.

In the TOH insert mode, SPE bytes are transferred,

unaltered, from the input parallel bus to the serial LVDS

output. On the other hand, TOH bytes are received

from the serial input port and are inserted in the STS-

12 frame before being sent to the LVDS output.

Although all TOH bytes from the 12 STS-1s are trans-

ferred into the device from each serial port, not all of

them get inserted in the frame. There are three hard-

coded exceptions to the TOH byte insertion:

Framing bytes (A1/A2 of all STS-1s) are not inserted

from the serial input bus. Instead, they can always be

regenerated.

Parity byte (B1 of STS#1) is not inserted from the

serial input bus. Instead, it is always recalculated

(the 11 bytes following B1 are replaced with all

zeros).

Pointer bytes (H1/H2/H3 of all STS-1s) are not

inserted from the serial input bus. Instead, they

always flow transparently from parallel input to LVDS

output.

In addition to the above hard-coded exceptions, the

source of some TOH bytes can be further controlled by

software. When configured to be in pass-through

mode, the specific bytes must flow transparently from

the parallel input. Note that blocks of 12 STS-1 bytes

forming an STS-12 are controlled as a whole. There

are 15 software controls per channel, as listed below:

Source of K1 and K2 bytes of the 12 STS-1s

(24 bytes) is specified by a control bit (per channel

control).

Source of S1 and M0 bytes of the 12 STS-1s

(24 bytes) is specified by a control bit (per channel

control).

Source of E1, F1, E2 bytes of the STS-1s (36 bytes)

is specified by a control it (per channel control).

Source of D1 bytes of the STS-1s (12 bytes) is spec-

ified by a control bit (per channel control).

Source of D2 bytes of the 12 STS-1s (12 bytes) is