參數(shù)資料
型號(hào)： OR3C80-4B432
元件分類： FPGA
英文描述： FPGA, 484 CLBS, 58000 GATES, PBGA432
封裝： BGA-432
文件頁(yè)數(shù)： 128/210頁(yè)
文件大?。?/td> 2138K
代理商： OR3C80-4B432
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24
Lucent Technologies Inc.
Preliminary Data Sheet, Rev. 1
ORCA Series 3 FPGAs
September 1998
Programmable Logic Cells (continued)
PLC Routing Resources
Generally, the
ORCA Foundry Development System is
used to automatically route interconnections. Interac-
tive routing with the
ORCA Foundry design editor
(EPIC) is also available for design optimization. To use
EPIC for interactive layout, an understanding of the
routing resources is needed and is provided in this sec-
tion.
The routing resources consist of switching circuitry and
metal interconnect segments. Generally, the metal
lines which carry the signals are designated as routing
segments. The switching circuitry connects the routing
segments, providing one or more of three basic func-
tions: signal switching, amplification, and isolation. A
net running from a PFU or PIC output (source) to a
PLC or PIC input (destination) consists of one or more
routing segments, connected by switching circuitry
called configurable interconnect points (CIPs).
The following sections discuss PLC, PIC, and inter-
quad routing resources. This section discusses the
PLC switching circuitry, intra-PLC routing, inter-PLC
routing, and clock distribution.
Configurable Interconnect Points
The process of connecting routing segments uses
three basic types of switching circuits: two types of
configurable interconnect points (CIPs) and bidirec-
tional buffers (BIDIs). The basic element in CIPs is one
or more pass transistors, each controlled by a configu-
ration RAM bit. The two types of CIPs are the mutually
exclusive (or multiplexed) CIP and the independent
CIP.
A mutually exclusive set of CIPs contains two or more
CIPs, only one of which can be on at a time. An inde-
pendent CIP has no such restrictions and can be on
independent of the state of other CIPs. Figure 18
shows an example of both types of CIPs.
Key: C = configuration data.
5-5973(C)
Figure 18. Configurable Interconnect Point
3-Statable Bidirectional Buffers
Bidirectional buffers, previously described in the SLIC
section of the programmable logic cell discussion, pro-
vide isolation as well as amplification for signals routed
a long distance. Bidirectional buffers are also used to
route signals diagonally in the PLC (described later in
the subsection entitled Intra-PLC Routing), and BIDIs
can be used to indirectly route signals through the
switching routing (xSW) segments. Any number from
zero to ten BIDIs can be used in a given PLC.
MULTIPLEXED CIP
A
B
C
O
A
B
C
O
CD
INDEPENDENT CIP
A
B
CD
B
A
=
2
相關(guān)PDF資料
PDF描述
OR3C80-4B600 FPGA, 484 CLBS, 58000 GATES, PBGA600
OR3C80-5B432 FPGA, 484 CLBS, 58000 GATES, PBGA432
OR3C80-5B600 FPGA, 484 CLBS, 58000 GATES, PBGA600
OR3T125-4B432 FPGA, 784 CLBS, 92000 GATES, PBGA432
OR3T125-4B600 FPGA, 784 CLBS, 92000 GATES, PBGA600
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參數(shù)描述
OR3C80-4BA352 制造商:AGERE 制造商全稱:AGERE 功能描述:3C and 3T Field-Programmable Gate Arrays
OR3C804BA352-DB 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 3872 LUT 356 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
OR3C80-4BA352I 制造商:AGERE 制造商全稱:AGERE 功能描述:3C and 3T Field-Programmable Gate Arrays
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