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參數(shù)資料
| 型號： | NIS3001QPT1 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Integrated Driver and MOSFET Power Chip for Synchronous Buck Controllers |
| 中文描述： | 4 A SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, BCC21 |
| 封裝： | QFN-21 |
| 文件頁數(shù)： | 2/18頁 |
| 文件大?。?/td> | 208K |
| 代理商： | NIS3001QPT1 |
NIS3001
http://onsemi.com
2
Figure 2. Block Diagram
VS
EN
CO
(2, 19)
GND
BST
TG
VIN
DRN
PGND
(5, 6)
+
NonOverlap
Control
+
Thermal
Shutdown
Level
Shifter
Delay
Delay
+
V
S
4.35 V
4.0 V
BG
(4)
(3)
(1)
(20, 21)
(711, 14, 18)
(12, 13)
(15, 16)
(17)
PIN FUNCTION DESCRIPTIONS
Pad #
Symbol
Description
1
CO
Logic level control input produces complementary output states.
2, 19
GND
Signal ground.
3
EN
Logic level enable input forces internal driver top gate and bottom gate low, and supply current to less
than 10 A when EN is low.
4
VS
Power supplied to the internal driver. A 1.0 F ceramic capacitor should be connected from this pin to
PGND.
5, 6
PGND
Power ground. High current return path for the lower internal.
711,
14, 18
DRN
Switching Node, connected to output inductor (10).
Switching Node, connected to the boost capacitor (14).
All pins connected internally.
12, 13
VIN
DCDC converter input voltage.
15, 16
TG
High Side Driver Output (Top Gate, this pin is used to monitor the gate).
17
BST
Bootstrap supply voltage input. In conjunction with a Schottky diode to Vs, a 0.1 F to 1.0 F ceramic
capacitor connected between BST and DRN (14).
20, 21
BG
Low Side Driver Output (Bottom Gate, this pin is used to monitor the gate).
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