參數(shù)資料
型號(hào)： NCV8881PWR2G
廠商： ON Semiconductor
文件頁(yè)數(shù)： 32/33頁(yè)
文件大?。?/td> 321K
描述： IC REG TRPL BUCK/LINEAR 16SOIC
標(biāo)準(zhǔn)包裝： 1
拓?fù)洌?/td> 降壓（降壓）（1），線性（LDO）（2）
功能： 車載
輸出數(shù)： 3
頻率 - 開關(guān)： 170kHz
電壓/電流 - 輸出 1： 3.3 V ~ 8 V，1.5A
電壓/電流 - 輸出 2： 5V，100mA
電壓/電流 - 輸出 3： 8.5V，40mA
帶 LED 驅(qū)動(dòng)器： 無
帶監(jiān)控器： 無
帶序列發(fā)生器： 無
電源電壓： 5 V ~ 19 V
工作溫度： -40°C ~ 150°C
安裝類型： 表面貼裝
封裝/外殼： 16-SOIC（0.295"，7.50mm 寬）裸露焊盤
供應(yīng)商設(shè)備封裝： 16-SOIC W
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： NCV8881PWR2GOSDKR
NCV8881
http://onsemi.com
32
Error Amplifier
Closed Loop Gain
Compensation Network
Modulator Gain
w
dB
OUT
ESR
C
ESR
=
1
w
OUT
OUT
LC
C
L  
=
1
w
2
2
1
1
C
R
Z
=
w
(    )
3
3
1
2
1
C
R
R
Z
+
=
w
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
+
=
2
1
2
1
2
1
1
C
C
C
C
R
P
w
3
3
2
1
C
R
P
=
w
Figure 59.
To reiterate, there are 3 primary goals to compensating.
Goal 1 is to have a high a unity gain bandwidth (UGB) that
is greater than 1/10 the switching frequency F
SW
, but less
than 1/2 the switching frequency. UGB is also known as the
crossover frequency. This is the point where the loop gain =
0 dB or a gain of 1. In the plot above, the UGB is the point
where the red line crosses the TBD axis. Goal 2 is to have the
loop gain cross 0 dB with a 20 dB/decade slope also known
as a 1 slope. Goal 3 is to achieve over 45?of phase margin
when the gain crosses 0 dB. These are just goals. Sometimes
the crossover frequency is reduced below 1/10 F
SW
 in order
to meet goal 3.
Conversely, some designs will push the crossover
frequency as high as it can (as long as it is below 1/2 F
SW
)
with a reduced phase margin of 30?in order to get a faster
transient response. The only two absolutes are that the
crossover frequency cannot exceed 1/2 F
SW
 and the phase
margin has to be greater than 0?at crossover. However, a
SMPS operating towards these absolutes will experience
severe ringing before it dampens out.
To achieve the above goals, the following guidelines
should be adopted.
 Place w
Z1
 at half the resonance of w
LC
 Place w
Z2
 at or around w
LC
 Place w
P1
 at w
ESR
 Place w
P2
 at half the switching frequency
Performing these calculations will take some amount of
iteration and bench testing is needed to verify results.
ON Semiconductor has developed a tool to speed up the
design process tremendously with great ease and accuracy.
This tool can be downloaded by following the link below:
http://www.onsemi.com/pub/Collateral/COMPCALC.ZIP
ORDERING INFORMATION
Device
Package
Shipping
 
NCV8881PWR2G
SOIC16W EP
(PbFree)
1000 / Tape & Reel
 For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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