參數(shù)資料
型號: NCP1523
廠商: Texas Instruments, Inc.
英文描述: 6-A, 2.2-V to 5.5-V INPUT, NON-ISOLATED, WIDE-OUTPUT, ADJUSTABLE POWER MODULE WITH TurboTrans
中文描述: 6甲,2.2 V至5.5 V輸入,非隔離,寬輸出,可調(diào)電源模塊的TurboTrans
文件頁數(shù): 6/35頁
文件大?。?/td> 1128K
代理商: NCP1523
www.ti.com
ELECTRICAL CHARACTERISTICS
PTH04T231W (Ceramic Capacitors)
T
A
= 25
°
C, V
I
= 5 V, V
O
= 3.3 V, C
I
= 300 μF ceramic, C
O
= 300 μF ceramic, and I
O
= I
O
max (unless otherwise stated)
PTH04T230W, PTH04T231W
SLTS271A–SEPTEMBER 2006–REVISED OCTOBER 2006
PARAMETER
TEST CONDITIONS
PTH04T231W
UNIT
MIN
TYP
MAX
I
O
Output current
Over V
O
range
25
°
C, natural convection
0
6
A
0.69
V
O
1.7
1.7 < V
O
3.6 V
O
+0.5
(1)
2.2
5.5
V
I
Input voltage range
Over I
O
range
V
5.5
V
OADJ
Output voltage adjust range
Over I
O
range
0.69
3.6
V
Set-point voltage tolerance
±
0.5
±
0.3
±
2
±
2
±
1
(2)
%V
o
%V
o
mV
Temperature variation
–40
°
C < T
A
< 85
°
C
Over V
I
range
Over I
O
range
Includes set-point, line, load, –40
°
C
T
A
85
°
C
R
SET
= 1.21 k
, V
O
= 3.3 V
R
SET
= 2.38 k
, V
O
= 2.5 V
R
SET
= 4.78 k
, V
O
= 1.8 V
I
O
= 6 A
R
SET
= 7.09 k
, V
O
= 1.5 V
R
SET
= 12.1 k
, V
O
= 1.2 V
R
SET
= 20.8 k
, V
O
= 1.0 V
R
SET
= 689 k
, V
O
= 0.7 V
20-MHz bandwidth
V
O
Line regulaltion
Load regulation
mV
Total output variation
±
1.5
(2)
%V
o
94%
92%
90%
η
Efficiency
89%
87%
85%
81%
V
O
Ripple (peak-to-peak)
Overcurrent threshold
1
%V
O
A
I
LIM
Reset, followed by auto-recovery
10
Recovery time
100
μs
w/o TurboTrans
C
O
= 300
μ
F, Type A
V
O
over/undershoot
Recovery time
70
mV
2.5 A/μs load step
50 to 100% I
O
max
V
I
= 3.3 V
V
O
= 2.5 V
w/o TurboTrans
C
O
= 800
μ
F, Type A
R
TT
= open
w/ TurboTrans
C
O
= 800
μ
F, Type A
R
TT
= 11.3 k
100
μs
Transient response
mV
V
O
over/undershoot
55
Recovery time
150
μs
mV
V
O
over/undershoot
35
I
IL
dV
track
/dt
Track input current (pin 9)
Pin to GND
–130
(3)
μA
Track slew rate capability
C
O
C
O
(max)
V
I
increasing, R
UVLO
= OPEN
V
i
decreasing, R
UVLO
= OPEN
Hysteresis, R
UVLO
= OPEN
Input high voltage (V
IH
)
Input low voltage (V
IL
)
Input low current (I
IL
), Pin 10 to GND
Inhibit (pin 10) to GND, Track (pin 9) open
1
V/ms
1.95
2.19
Adjustable Under-voltage lockout
(pin 10)
UVLO
ADJ
1.3
1.5
V
0.5
Open
(4)
V
Inhibit control (pin 10)
-0.2
0.8
-235
μA
I
in
f
s
Input standby current
5
mA
Switching frequency
Over V
I
and I
O
ranges, SmartSync (pin 1) to GND
300
kHz
Synchronization (SYNC)
frequency
f
SYNC
240
400
kHz
V
SYNCH
V
SYNCL
t
SYNC
C
I
SYNC High-Level Input Voltage
2
5.5
V
SYNC Low-Level Input Voltage
0.8
V
SYNC Minimum Pulse Width
200
nSec
External input capacitance
Ceramic
300
(5)
μF
(1)
(2)
The minimum input voltage is 2.2 V or (V
+ 0.5) V, whichever is greater.
The set-point voltage tolerance is affected by the tolerance and stability of R
SET
. The stated limit is unconditionally met if R
SET
has a
tolerance of 1% with 100 ppm/°C or better temperature stability. .
A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control pin 9. The
open-circuit voltage is less than V
.
This control pin has an internal pull-up. Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when
input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. The open-circuit voltage is less than 3.5
Vdc. For additional information, see the related application note.
300 μF of ceramic input capacitance is required for proper operation.
(3)
(4)
(5)
6
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