參數(shù)資料
型號: NCP1239
廠商: ON SEMICONDUCTOR
英文描述: Low−Standby High Performance PWM Controller
文件頁數(shù): 32/38頁
文件大小: 1145K
代理商: NCP1239
NCP1239
http://onsemi.com
32
In the NCP1239, the ramp features a swing of 3.2 V.
Suppose we select a 65 kHz version. Over a 65 kHz
frequency, it corresponds to a 130 mV/ms ramp. In our
FLYBACK design, let’s assume that our primary inductance
Lp is 350 mH, and the SMPS delivers 12 V with a Np:Ns
ratio of 1:0.1. The OFF time slope of the primary current is:
Ns
Np
Lp
projected over a 0.1 Rsense for instance. If we select 75%
of the downslope as the required amount of ramp
compensation, then we shall inject 27 mV/ms. Our internal
compensation being of 208 mV/ms, the divider ratio
(divratio) between R
ramp
and the 32 k is 0.178. A few lines
of
algebra
to
19 k
divratio
(1
divratio)
(Vout
Vf)
that is, 371 mA/ms or 37 mV/ms, once
determine
R
ramp
:
Rramp
6.92 k
.
The ramp is disabled during standby (i.e., when pfcON is
low). This inhibition avoids that the ramp compensation
modifies the setpoint above which the NCP1239 enables
PFC.
Frequency Jittering
Frequency jittering is a method used to soften the EMI
signature by spreading the energy in the vicinity of the main
switching component. NCP1239 offers a +3.5% deviation of
the nominal switching frequency. The sweep sawtooth is
internally generated and modulates the clock up and down
with a period depending on the Pin 6 capacitor (10 ms
typically with 390 nF, 10 mS * Cpin6 / 390 nF in general).
Again, if one selects a 65 kHz version, the frequency will
equal 65 kHz in the middle of the ripple and will increase as
V
pin6
rises or decrease as V
pin6
ramps down. Figure 53
portrays the behavior we have adopted:
65kHz
67.6kHz
62.4kHz
Internal
ramp
Internal
sawtooth
10ms
Figure 53.
The V
pin6
ramp is used to introduce frequency jittering on the oscillator sawtooth
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