參數(shù)資料
型號(hào)： NAND512W4A0BZB1E
廠商： NUMONYX
元件分類： PROM
英文描述： 32M X 16 FLASH 3V PROM, 35 ns, PBGA55
封裝： 8 X 10 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, TFBGA-55
文件頁(yè)數(shù)： 31/57頁(yè)
文件大?。?/td> 916K
代理商： NAND512W4A0BZB1E
37/57
NAND128-A, NAND256-A, NAND512-A, NAND01G-A
Table 20. AC Characteristics for Command, Address, Data Input
Note: 1. If tELWL is less than 10ns, tWLWH must be minimum 35ns, otherwise, tWLWH may be minimum 25ns.
Symbol
Alt.
Symbol
Parameter
1.8V
Devices
3V
Devices
Unit
tALLWL
tALS
Address Latch Low to Write Enable Low
AL Setup time
Min
0
ns
tALHWL
Address Latch High to Write Enable Low
tCLHWL
tCLS
Command Latch High to Write Enable Low
CL Setup time
Min
0
ns
tCLLWL
Command Latch Low to Write Enable Low
tDVWH
tDS
Data Valid to Write Enable High
Data Setup time
Min
20
ns
tELWL
tCS
Chip Enable Low to Write Enable Low
E Setup time
Min
0
ns
tWHALH
tALH
Write Enable High to Address Latch High
AL Hold time
Min
10
ns
tWHALL
Write Enable High to Address Latch Low
tWHCLH
tCLH
Write Enable High to Command Latch High
CL hold time
Min
10
ns
tWHCLL
Write Enable High to Command Latch Low
tWHDX
tDH
Write Enable High to Data Transition
Data Hold time
Min
10
ns
tWHEH
tCH
Write Enable High to Chip Enable High
E Hold time
Min
10
ns
tWHWL
tWH
Write Enable High to Write Enable Low
W High Hold
time
Min
20
15
ns
tWLWH
tWP
Write Enable Low to Write Enable High
W Pulse Width
Min
40
25(1)
ns
tWLWL
tWC
Write Enable Low to Write Enable Low
Write Cycle time
Min
60
50
ns
相關(guān)PDF資料
PDF描述
NAND512R3A0CV1F 64M X 8 FLASH 1.8V PROM, 35 ns, PDSO48
NAND512R3A0AN6E 64M X 8 FLASH 1.8V PROM, 35 ns, PDSO48
NAND512R3A0AZA6E 64M X 8 FLASH 1.8V PROM, 35 ns, PBGA63
NAND512R3A2AN6T 64M X 8 FLASH 1.8V PROM, 35 ns, PDSO48
NAND512R3A2CN1F 64M X 8 FLASH 1.8V PROM, 35 ns, PDSO48
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