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參數(shù)資料
| 型號(hào)： | N01L083WC2AT-55I |
| 元件分類： | SRAM |
| 英文描述： | 128K X 8 STANDARD SRAM, 55 ns, PDSO32 |
| 封裝： | TSOP1-32 |
| 文件頁(yè)數(shù)： | 4/10頁(yè) |
| 文件大?。?/td> | 162K |
| 代理商： | N01L083WC2AT-55I |
(DOC# 14-02-008 REV I ECN# 01-1283)
3
The specifications of this device are subject to change without notice. For latest documentation see http://www.amis.com.
AMI Semiconductor, Inc.
N01L083WC2A
Absolute Maximum Ratings1
1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operating section of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Item
Symbol
Rating
Unit
Voltage on any pin relative to VSS
VIN,OUT
–0.3 to VCC+0.3
V
Voltage on VCC Supply Relative to VSS
VCC
–0.3 to 4.5
V
Power Dissipation
PD
500
mW
Storage Temperature
TSTG
–40 to 125
oC
Operating Temperature
TA
-40 to +85
oC
Soldering Temperature and Time
TSOLDER
260oC, 10sec
oC
Operating Characteristics (Over Specified Temperature Range)
Item
Symbol
Test Conditions
Min.
Typ1
1. Typical values are measured at Vcc=Vcc Typ., TA=25°C and not 100% tested.
Max
Unit
Supply Voltage
VCC
2.3
3.0
3.6
V
Data Retention Voltage
VDR
Chip Disabled3
1.8
V
Input High Voltage
VIH
1.8
VCC+0.3
V
Input Low Voltage
VIL
–0.3
0.6
V
Output High Voltage
VOH
IOH = 0.2mA
VCC–0.2
V
Output Low Voltage
VOL
IOL = -0.2mA
0.2
V
Input Leakage Current
ILI
VIN = 0 to VCC
0.5
A
Output Leakage Current
ILO
OE = VIH or Chip Disabled
0.5
A
Read/Write Operating Supply Current
@ 1
S Cycle Time2
2. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current required to drive
output capacitance expected in the actual system.
ICC1
VCC=3.6 V, VIN=VIH or VIL
Chip Enabled, IOUT = 0
2.0
3.0
mA
Read/Write Operating Supply Current
@ 70 nS Cycle Time2
ICC2
VCC=3.6 V, VIN=VIH or VIL
Chip Enabled, IOUT = 0
9.5
14.0
mA
Page Mode Operating Supply Current
@ 70ns Cycle Time2 (Refer to Power
Savings with Page Mode Operation
diagram)
ICC3
VCC=3.6 V, VIN=VIH or VIL
Chip Enabled, IOUT = 0,
4mA
Read/Write Quiescent Operating Sup-
ply Current3
3. This device assumes a standby mode if the chip is disabled (CE1 high or CE2 low). In order to achieve low standby current all
inputs must be within 0.2 volts of either VCC or VSS.
ICC4
VCC=3.6 V, VIN=VIH or VIL
Chip Enabled, IOUT = 0,
f = 0
3.0
mA
Maximum Standby Current3
ISB1
VIN = VCC or 0V
Chip Disabled
tA= 85oC, VCC = 3.6 V
2.0
20
A
Maximum Data Retention Current3
IDR
Vcc = 1.8V, VIN = VCC or 0
Chip Disabled, tA= 85oC
10
A
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