參數(shù)資料
型號: MTW14N50E
廠商: MOTOROLA INC
元件分類: JFETs
英文描述: CONNECTOR ACCESSORY
中文描述: 14 A, 500 V, 0.4 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-247AE
文件頁數(shù): 5/8頁
文件大小: 205K
代理商: MTW14N50E
5
Motorola TMOS Power MOSFET Transistor Device Data
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
Figure 8. Gate–To–Source and Drain–To–Source
Voltage versus Total Charge
V
0
0
QT, TOTAL CHARGE (nC)
V
15
RG, GATE RESISTANCE (OHMS)
1
10
1000
10000
V
1000
100
10
DRAIN–TO–SOURCE DIODE CHARACTERISTICS
0
VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
I
10
20
30
40
50
60
70
80
90
100
100
14
12
10
8
6
4
2
0
0.2
0.4
0.6
0.8
1
500
400
300
200
100
0
TJ = 25
°
C
ID = 14 A
VDD = 250 V
VGS = 10 V
TJ = 25
°
C
VGS = 0 V
dIS/dt = 100 A/
μ
s
12
9
6
3
TJ = 25
°
C
ID = 14 A
VDS = 400 V
VDS
VGS
2000
200
20
2
20
200
QT
Q2
Q1
Q3
tf
tr
td(on)
td(off)
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define the
maximum simultaneous drain–to–source voltage and drain
current that a transistor can handle safely when it is forward
biased. Curves are based upon maximum peak junction tem-
perature and a case temperature (TC) of 25
°
C. Peak repetitive
pulsed power limits are determined by using the thermal re-
sponse data in conjunction with the procedures discussed in
AN569, “Transient Thermal Resistance–General Data and Its
Use.”
Switching between the off–state and the on–state may tra-
verse any load line provided neither rated peak current (IDM)
nor rated voltage (VDSS) is exceeded and the transition time
(tr,tf) do not exceed 10
μ
s. In addition the total power averaged
over a complete switching cycle must not exceed (TJ(MAX) –
TC)/(R
θ
JC).
A Power MOSFET designated E–FET can be safely used in
switching circuits with unclamped inductive loads. For reliable
operation, the stored energy from circuit inductance dissi-
pated in the transistor while in avalanche must be less than
the rated limit and adjusted for operating conditions differing
from those specified. Although industry practice is to rate in
terms of energy, avalanche energy capability is not a
constant. The energy rating decreases non–linearly with an
increase of peak current in avalanche and peak junction tem-
perature.
Although many E–FETs can withstand the stress of drain–
to–source avalanche at currents up to rated pulsed current
(IDM), the energy rating is specified at rated continuous cur-
rent (ID), in accordance with industry custom. The energy rat-
ing must be derated for temperature as shown in the
accompanying graph (Figure 12). Maximum energy at cur-
rents below rated continuous ID can safely be assumed to
equal the values indicated.
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