參數(shù)資料
型號: MTP3N60E
廠商: MOTOROLA INC
元件分類: JFETs
英文描述: TMOS POWER FET 3.0 AMPERES 600 VOLTS RDS(on) = 2.2 OHMS
中文描述: 3 A, 600 V, 2.2 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB
文件頁數(shù): 5/8頁
文件大?。?/td> 183K
代理商: MTP3N60E
I
Figure 12. Commutating Safe Operating Area (CSOA)
0
200
400
4
3
2
0
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
+
+
Figure 13. Commutating Safe Operating Area
Test Circuit
VR
VGS
IFM
20 V
RGS
DUT
IS
Li
VR = 80% OF RATED VDS
VdsL = Vf + Li
dls/dt
di/dt
60 A/
μ
s
800
Figure 14. Unclamped Inductive Switching
Test Circuit
Figure 15. Unclamped Inductive Switching
Waveforms
t
L
VDS
ID
VDD
tP
V(BR)DSS
VDD
ID(t)
C
4700
μ
F
250 V
RGS
50
IO
Vds(t)
t, (TIME)
WDSR
1
2
L IO2
V(BR)DSS
V(BR)DSS– VDD
VDS
1
600
5
Motorola TMOS Power MOSFET Transistor Device Data
COMMUTATING SAFE OPERATING AREA (CSOA)
The Commutating Safe Operating Area (CSOA) of Figure
12 defines the limits of safe operation for commutated
source-drain current versus re-applied drain voltage when
the source-drain diode has undergone forward bias. The
curve shows the limitations of IFM and peak VR for a given
commutation speed. It is applicable when waveforms similar
to those of Figure 11 are present. Full or half-bridge PWM DC
motor controllers are common applications requiring CSOA
data.
The time interval tfrr is the speed of the commutation cycle.
Device stresses increase with commutation speed, so tfrr is
specified with a minimum value. Faster commutation speeds
require an appropriate derating of IFM, peak VR or both. Ulti-
mately, tfrr is limited primarily by device, package, and circuit
impedances. Maximum device stress occurs during trr as the
diode goes from conduction to reverse blocking.
VDS(pk) is the peak drain–to–source voltage that the device
must sustain during commutation; IFM is the maximum for-
ward source-drain diode current just prior to the onset of
commutation.
VR is specified at 80% of V(BR)DSS to ensure that the
CSOA stress is maximized as IS decays from IRM to zero.
RGS should be minimized during commutation. TJ has only
a second order effect on CSOA.
Stray inductances, Li in Motorola’s test circuit are assumed
to be practical minimums.
Figure 11. Commutating Waveforms
15 V
VGS
0
90%
IFM
dlS/dt
IS
10%
trr
tfrr
IRM
ton
VDS
Vf
VdsL
VR
VDS(pk)
MAX. CSOA
STRESS AREA
0.25 IRM
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