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參數(shù)資料
| 型號： | MTC20136MB-I1 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | ADSL TRANSCEIVER CONTROLLER |
| 中文描述： | 寬帶收發(fā)器控制器 |
| 文件頁數(shù)： | 18/25頁 |
| 文件大?。?/td> | 634K |
| 代理商： | MTC20136MB-I1 |
MTC20136
18/25
Ctrl-E Semaphore
A simple semaphore mechanism is provided to allow control of the data consistency of the Ctrle-
DataBuffer. One mailbox address is defined as a two-bit semaphore register protected by control logic to
prevent unallowed write accesses to this register.
Before the databuffer is read or written by one of the two interfaces (ASB or Ctrl-E) this interface should
perform a ’P-operation’ on the semaphore. After a read or write of the databuffer the interface should do
a ’V-operation’ releasing the semaphore. P and V operations are performed by write and read accesses
to the semaphore register. The semaphore will be updated as shown in Table 5.
Each semaphore operation (P or V) consists of two consecutive actions that don’t have to be atomic :
a)Write the correct value to the semaphore address (see Table 5)
b)Read the value in the semaphore address.
If the value read is different from the value writen the P or V operation was not succesfull and should be
tried again.
Table 5. Semaphore P and V operations: new value after write by ASB or Ctrl-E
The databuffers can be accessed without using the semaphore mechanism if data consistency is guaran-
teed in another way. If other values are written to the semaphore address than the values listed the write
will not be performed.
Ctrl-E Physical Interface
Two parallel bus modes are defined to support both Motorola-compatible and Intel-compatible timing and
control signals. This interface specification is compliant to Utopia Level 2 Parallel Management Interface.
Selection of the Ctrl-E physical interface bus mode is done with the C_Mode[1:0] input pins :
Table 6. Bus mode selected with C_Mode[1:0] inputs
semaphore
operation
originator
write
value
previous semaphore value
semaphore
free
semaphore
taken by
ASB
01
b
01
b
Ctrl-E
11
b
11
b
00
b
01
b
P
ASB
01
b
Ctrl-E
11
b
11
b
01
b
11
b
V
ASB
00
b
00
b
00
b
11
b
Ctrl-E
00
b
00
b
01
b
00
b
C_Mode[1]
0
0
1
1
C_Mode[0]
0
1
1
0
Description
Motorola-type parallel interface
Intel-type parallel interface
Reserved
Reserved
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