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參數(shù)資料
| 型號： | MT9126 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Quad ADPCM Transcoder(四ADPCM編解碼器) |
| 中文描述： | 四差分PcM轉(zhuǎn)碼器（四差分PcM編解碼器） |
| 文件頁數(shù)： | 5/25頁 |
| 文件大小： | 138K |
| 代理商： | MT9126 |
MT9126
8-5
Serial (AD)PCM Data I/O
Serial data transfer to/from the Quad ADPCM
transcoder is provided through one ADPCM and two
PCM ports (ADPCMi, ADPCMo, PCMi1, PCMo1,
PCMi2, PCMo2). Data is transferred through these
ports
according
to
either
requirements. The device determines the mode of
operation by monitoring the signal applied to the F0i
pin. When a valid ST-BUS frame pulse (244nSec low
going pulse) is applied to the F0i pin the transcoder
will
assume
ST-BUS
operation.
continuously to V
SS
the transcoder will assume SSI
operation. Pin functionality in each of these modes is
described in the following sub-sections.
ST-BUS
or
SSI
If
F0i
is
tied
ST-BUS Mode
During ST-BUS operation the C2o, EN1, EN2 and
F0od outputs become active and all serial timing is
derived from the MCLK/C4i and F0i inputs while the
BCLK input is tied to V
SS
. (See Figures 7, 8 & 9.)
Basic Rate “D” and “C” Channels
In ST-BUS mode, when ENB1 is brought low,
transparent transport of the ST-BUS "Basic Rate D-
and C-channels" is supported through the PCMi1
and PCMo1 pins. This allows a microprocessor
controlled device, connected to the PCMi/o1 pins, to
access the "D" and "C" channels of a transmission
device connected to the ADPCMi/o pins. When
ENB1 is brought high, the “D” and “C” channel
outputs are tristated. Basic Rate “D” and “C”
channels are not supported in LINEAR mode.(See
Figure 7.)
SSI Mode
During SSI operation the BCLK, ENB1 and ENB2/
F0od inputs become active. The C2o, EN1, and EN2
outputs are forced to a high-impedance state except
during LINEAR operation during which the EN1
output remains active. (See Figures 4, 5 & 6.)
The SSI port is a serial data interface, including data
input and data output pins, a variable rate bit clock
input and two input strobes providing enables for
data transfers. There are three SSI I/O ports on the
Quad ADPCM; the PCMi/o1 PCM port, the PCMi/o2
PCM port, and the ADPCMi/o port. The two PCM
ports may transport 8-bit companded PCM or 16-bit
linear PCM. The alignment of the channels is
determined by the two input strobe signals ENB1
and ENB2/F0od. The bit clock (BCLK) and input
strobes (ENB1 and ENB2/F0od) are common for all
three of the serial I/O ports. BCLK can be any
frequency
between
128
synchronized to the input strobes. BCLK may be
discontinuous outside of the strobe boundaries
except when LINEAR=1. In LINEAR mode, BCLK
must be 2048 kHz and continuous for 64 cycles after
the ENB1 rising edge and for the duration of ENB2/
F0od.
kHz
and
4096
kHz
Mode Select Operation (MS1, MS2, MS3,
MS4, MS5, MS6)
Mode Select pins MS1, MS2 and MS3 program
different bit rate ADPCM coding, bypass, algorithmic
reset and disable modes for all four encoder
functions simultaneously. When 24 kbit/s ADPCM
mode is selected bit 4 is unused while in 16 kb/s
ADPCM mode all ADPCM channels are packed
contiguously into one 8-bit octet. Mode Select pins
MS4, MS5 and MS6 operate in the same manner for
the four decode functions. The mode selects must be
set up according to the timing constraints illustrated
in Figures 16 and 17.
32 kbit/s ADPCM Mode
In 32 kbit/s ADPCM mode, the 8-bit PCM octets of
the B1, B2, B3 and B4 channels (PCMi1 and PCMi2)
are compressed into four 4-bit ADPCM words on
ADPCMo. Conversely, the 4-bit ADPCM words of the
B1, B2, B3 and B4 channels from ADPCMi
expanded into four 8-bit PCM octets on PCMo1 and
PCMo2. The 8-bit PCM octets (A-Law or
μ
-Law) are
transferred most significant bit first starting with b7
and ending with b0. ADPCM words are transferred
most significant bit first starting with I1 and ending
with I4 (See Figures 4 & 7). Reference ITU-T G.726
for I-bit definitions. Note that the SEL pin performs no
function in this mode.
are
24 kbit/s ADPCM Mode
In 24 kbit/s mode PCM octets are transcoded into 3-
bit words rather than the 4-bit words utilized in 32
kbit/s ADPCM. This is useful in situations where
lower bandwidth transmission is required. Dynamic
operation of the mode select control pins will allow
switching from 32 kbit/s mode to 24 kbit/s mode on a
frame by frame basis. The 8 bit PCM octets (A-Law
or
μ
-Law) are transferred most significant bit first
starting with b7 and ending with b0. ADPCM words
are transferred most significant bit first starting with
I1 and ending with I3 (I4 becomes don’t care). (See
Figures 4 & 7.) Note that the SEL pin performs no
function in this mode.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9126AE | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:CMOS Quad ADPCM Transcoder |
| MT9126AE1 | 制造商:Microsemi Corporation 功能描述:ADPCM VOICE COMPRESSION G.726 16KBPS/24KBPS/32KBPS 5V 28PDIP - Rail/Tube 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TRANSCODER QUAD ADPCM 28PDIP 制造商:Microsemi Corporation 功能描述:IC TRANSCODER QUAD ADPCM 28PDIP |
| MT9126AS | 制造商:Microsemi Corporation 功能描述: |
| MT9126AS1 | 制造商:Microsemi Corporation 功能描述:ADPCM VOICE COMPRESSION G.726 16KBPS/24KBPS/32KBPS 5V 28SOIC - Rail/Tube 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TRANSCODER QUAD ADPCM 28SOIC 制造商:Microsemi Corporation 功能描述:IC TRANSCODER QUAD ADPCM 28SOIC |
| MT9126ASR | 制造商:Microsemi Corporation 功能描述: |
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