參數(shù)資料
型號： MT9085B
廠商： Mitel Networks Corporation
英文描述： PAC - Parallel Access Circuit(并行存取電路)
中文描述： 委員會-并行訪問電路（并行存取電路）
文件頁數(shù)： 15/21頁
文件大小： 111K
代理商： MT9085B
MT9085B
2-139
Timing is over recommended temperature & power supply voltages.
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
Figure 15 - DFPo and CFPo Output Timing
AC Electrical Characteristics
- Data Memory and Connect Memory Frame Pulse (See
Figure 15)
- Voltages are with respect to Ground (V
SS
) unless otherwise stated.
Characteristics
Sym
Min
Typ
Max
Units
Test Conditions
1
Data - Memory Frame Pulse
Delay
t
DFPo
0
37
ns
C
L
=85 pF
2
Connection - Memory Frame
Pulse Delay
t
CFPo
0
30
ns
C
L
=85 pF
C16i
CKD=0
DFPo
DFPo
CFPo
CKD=1
DFPo
DFPo
CFPo
t
DFPo
t
DFPo
t
DFPo
t
DFPo
t
CFPD
t
CFPD
t
DFPo
t
DFPo
t
DFPo
t
DFPo
68 C16
Cycles
t
CFPo
t
CFPo
71 C16 Cycles
64 C16
Cycles
64 C16
Cycles
ST-BUS Frame Boundary
Established by F0i
ST-BUS Frame Boundary
Established by F0i
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