
Preliminary Information
MT9075B
37
Table 24 - Interrupt Mask Word Two
(Page 01H, Address 1DH)
Bit
Name
Functional Description
2
BEROI
(0)
Bit
Interrupt.
When unmasked (BERO
= 1), an interrupt is initiated when
the bit error counter overflows.
Interrupt vector = 00010000.
Error
Counter
Overflow
1
AUXPI
(0)
Auxiliary Pattern Interrupt.
When
unmasked (AUXPI = 1), an interrupt
is initiated when the AUXP status bit
of page 03H, address 15H goes
high. Interrupt vector = 01000000.
0
CMFOI
(0)
Receive
Counter Overflow Interrupt.
When
unmasked (CMFO = 1), an interrupt
is
initiated
when
multiframe
counter
Interrupt vector = 00010000.
CRC-4
Multiframe
the
CRC-4
overflows.
Bit
Name
Functional Description
7
MFSYI
(0)
Multiframe
Interrupt.
(MFSYI = 1), an interrupt is initiated
when multiframe synchronization is
lost. Interrupt vector = 10000000.
Synchronization
When
unmasked
6
CSYNI
(0)
CRC-4
Synchronization Interrupt.
When
unmasked (CSYNI = 1), an interrupt
is initiated when CRC-4 multiframe
synchronization is lost. Interrupt
vector = 10000000.
Multiframe
5
- - -
Unused.
4
YI
(0)
Remote Signalling Multiframe
Alarm Interrupt.
When unmasked
(YI = 1), an interrupt is initiated
when
a
remote
multiframe
alarm
received.
Interrupt
10000000.
signalling
signal
vector
is
=
3
1SECI
(0)
One Second Status Interrupt.
When unmasked (1SECI = 1), an
interrupt is initiated when the
1SEC status bit (page 03H,
address 12H, bit 7) changes from
zero to one. Interrupt vector =
00001000.
Table 25: Interrupt Mask Word Three
(Page 01H, Address 1EH)
2
T1I
(0)
T1
unmasked (T1I = 1), an interrupt is
initiated when the T1 timer bit (page
03H, address 12H, bit 5) changes
from zero to one. Interrupt vector =
00001000.
Timer
Interrupt.
When
1
T2I
(0)
T2
unmasked (T2I = 1), an interrupt is
initiated when the T2 timer bit (page
03H, address 12H, bit 4) changes
from zero to one. Interrupt vector =
00001000.
Timer
Interrupt.
When
0
- - -
Unused
Bit
Name
Functional Description
7-4
---
(0000)
Unused.
Set low for normal operation.
3
CTXP
(0)
Custom Transmit Pulse Level.
A
zero means that the transmit pulse
level is determined by the bits TX2-0
listed in the table entry below. When
CPL is a one, the pulse level is
determined
by
programmed in registers 1CH - 1Fh on
Page 2.
coefficients
2-0
TX2-0
(0)
Transmit pulse amplitude.
Select the
TX2-TX0 bits according to the line
type, value of termination resistors
(R
T
), and transformer turns ratio used
TX2 TX1 TX0 Line(
) R
T
(
) Xfmr
0 0 0 120 0 1:2
0 0 1 120 0 1:1
0* 1 0 120 15 1:2
0 1 1 120/75 12.1 1:2
1 0 0 75 0 1:2
1 0 1 75 0 1:1
1* 1 0 75 9.1 1:2
1 1 1 75/120 12.1 1:2
*These configurations provide the best
matching characteristics.
Table 26: Transmit Pulse Control Word
(Page 01H, Address 1FH)
Bit
Name
Functional Description
Table 25: Interrupt Mask Word Three
(Page 01H, Address 1EH)