參數(shù)資料
型號(hào): MT58L512L18PS-7.5IT
元件分類: SRAM
英文描述: 512K X 18 CACHE SRAM, 4 ns, PQFP100
封裝: PLASTIC, MS-026BHA, TQFP-100
文件頁數(shù): 12/32頁
文件大?。?/td> 616K
代理商: MT58L512L18PS-7.5IT
2
8Mb: 512K x 18, 256K x 32/36 Pipelined, SCD SyncBurst SRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT58L512L18P_2.p65 – Rev. 6/01
2001, Micron Technology, Inc.
8Mb: 512K x 18, 256K x 32/36
PIPELINED, SCD SYNCBURST SRAM
FUNCTIONAL BLOCK DIAGRAM
512K X 18
SA0, SA1, SAs
ADDRESS
REGISTER
ADV#
CLK
BINARY
COUNTER AND
LOGIC
CLR
Q1
Q0
ADSC#
19
17
19
BWb#
BWa#
CE#
BYTE “b”
WRITE REGISTER
BYTE “a”
WRITE REGISTER
ENABLE
REGISTER
SA0'
SA1'
OE#
SENSE
AMPS
512K x 9 x 2
MEMORY
ARRAY
ADSP#
2
SA0-SA1
MODE
CE2
CE2#
GW#
BWE#
PIPELINED
ENABLE
DQs
DQPa
DQPb
2
OUTPUT
REGISTERS
INPUT
REGISTERS
E
BYTE “b”
WRITE DRIVER
9
18
BYTE “a”
WRITE DRIVER
OUTPUT
BUFFERS
NOTE: Functional Block Diagrams illustrate simplified device operation. See Truth Table, Pin Descriptions, and timing diagrams
for detailed information.
FUNCTIONAL BLOCK DIAGRAM
256K X 32/36
ADDRESS
REGISTER
ADV#
CLK
BINARY
COUNTER
CLR
Q1
Q0
ADSP#
ADSC#
MODE
18
16
18
BWd#
BWc#
BWb#
BWa#
BWE#
GW#
CE#
CE2
CE2#
OE#
BYTE “d”
WRITE REGISTER
BYTE “c”
WRITE REGISTER
BYTE “b”
WRITE REGISTER
BYTE “a”
WRITE REGISTER
ENABLE
REGISTER
PIPELINED
ENABLE
DQs
DQPa
DQPb
DQPc
DQPd
4
OUTPUT
REGISTERS
SENSE
AMPS
256K x 8 x 4
(x32)
256K x 9 x 4
(x36)
MEMORY
ARRAY
OUTPUT
BUFFERS
E
BYTE “a”
WRITE DRIVER
BYTE “b”
WRITE DRIVER
BYTE “c”
WRITE DRIVER
9
36
9
INPUT
REGISTERS
SA0, SA1, SAs
SA0'
SA1'
SA0-SA1
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