參數(shù)資料
型號(hào): MT58L32L36PT-7.5
元件分類: SRAM
英文描述: 32K X 36 CACHE SRAM, 4.2 ns, PQFP100
封裝: PLASTIC, TQFP-100
文件頁數(shù): 16/18頁
文件大?。?/td> 354K
代理商: MT58L32L36PT-7.5
7
1Mb: 64K x 18, 32K x 32/36 3.3V I/O, Pipelined, SCD SyncBurst SRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT58L64L18P_B.p65 – Rev. B, Pub. 11/02
2002, Micron Technology, Inc.
1Mb: 64K x 18, 32K x 32/36
3.3V I/O, PIPELINED, SCD SYNCBURST SRAM
NOT RECOMENDED FOR NEW DESIGNS
INTERLEAVED BURST ADDRESS TABLE (MODE = NC OR HIGH)
FIRST ADDRESS (EXTERNAL)
SECOND ADDRESS (INTERNAL)
THIRD ADDRESS (INTERNAL)
FOURTH ADDRESS (INTERNAL)
X...X00
X...X01
X...X10
X...X11
X...X01
X...X00
X...X11
X...X10
X...X11
X...X00
X...X01
X...X11
X...X10
X...X01
X...X00
LINEAR BURST ADDRESS TABLE (MODE = LOW)
FIRST ADDRESS (EXTERNAL)
SECOND ADDRESS (INTERNAL)
THIRD ADDRESS (INTERNAL)
FOURTH ADDRESS (INTERNAL)
X...X00
X...X01
X...X10
X...X11
X...X01
X...X10
X...X11
X...X00
X...X10
X...X11
X...X00
X...X01
X...X11
X...X00
X...X01
X...X10
FUNCTION
GW#
BWE#
BWa#
BWb#
READ
H
X
READ
H
L
H
WRITE Byte “a”
H
L
H
WRITE Byte “b”
H
L
H
L
WRITE All Bytes
H
L
WRITE All Bytes
L
X
PARTIAL TRUTH TABLE FOR WRITE COMMANDS (x32/x36)
FUNCTION
GW#
BWE#
BWa#
BWb#
BWc#
BWd#
READ
H
X
READ
H
L
H
WRITE Byte “a”
H
L
H
WRITE All Bytes
H
LLLL
L
WRITE All Bytes
L
X
NOTE: Using BWE# and BWa# through BWd#, any one or more bytes may be written.
PARTIAL TRUTH TABLE FOR WRITE COMMANDS (x18)
相關(guān)PDF資料
PDF描述
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