- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384757 > MT55L512L18P-1 (Micron Technology, Inc.) IBM AT-AT NULL MODEM CABL15 FT FF PDF資料下載
參數(shù)資料
| 型號(hào)： | MT55L512L18P-1 |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | IBM AT-AT NULL MODEM CABL15 FT FF |
| 中文描述： | 8MB的ZBT SRAM的 |
| 文件頁(yè)數(shù)： | 14/30頁(yè) |
| 文件大?。?/td> | 497K |
| 代理商： | MT55L512L18P-1 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)當(dāng)前第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)
14
8Mb: 512K x 18, 256K x 32/36 Pipelined ZBT SRAM
MT55L512L18P_2.p65
–
Rev. 6/01
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2001, Micron Technology, Inc.
8Mb: 512K x 18, 256K x 32/36
PIPELINED ZBT SRAM
BGA PIN DESCRIPTIONS (continued)
x18
4F
x32/x36
4F
SYMBOL TYPE
OE#
DESCRIPTION
Input
Output Enable: This
active LOW, asynchronous input enables the
data I/O output drivers.
Synchronous Address Advance/Load: When HIGH, this input is
used to advance the internal burst counter, controlling burst
access after the external addressis loaded. When ADV#/LD# is
HIGH, R/W# is ignored. A LOW on ADV#/LD# clocks a new
address at the CLK rising edge.
Mode: This input selects the burst sequence. A LOW on this
input selects
“
linear burst.
”
NC or HIGH on this input selects
“
interleaved burst.
”
Do not alter input state while device is
operating.
No Function: These pins are internally connected to the die and
will have the capacitance of input pins. It is allowable to leave
these pins unconnected or driven by signals. These pins are
reserved for address expansion; 4A becomes an SA at 16Mb
density.
Input/ SRAM Data I/Os: For the x18 version, Byte
“
a
”
is DQa
’
s; Byte
“
b
”
Output is DQb
’
s. For the x32 and x36 versions, Byte
“
a
”
is DQa
’
s;
Byte
“
b
”
is DQb
’
s; Byte
“
c
”
is DQc
’
s; Byte
“
d
”
is DQd
’
s. Input
data must meet setup and hold times around the rising edge of
CLK.
4B
4B
ADV#/LD# Input
3R
3R
MODE
Input
4A
4A
NF
Input
(a)
6F, 6H, 6L,
6N, 7E, 7G,
7K, 7P
(b)
1D, 1H,
1L, 1N, 2E,
2G, 2K, 2M
(a)
6K, 6L,
6M, 6N, 7K,
7L, 7N, 7P
(b)
6E, 6F,
6G, 6H, 7D,
7E, 7G, 7H
(c)
1D, 1E,
1G, 1H, 2E,
2F, 2G, 2H
(d)
1K, 1L,
1N, 1P, 2K,
2L, 2M, 2N
6P
6D
2D
2P
DQa
DQb
DQc
DQd
6D
2P
–
–
NF/
DQPa
NF/
DQPb
NF/
DQPc
NF/
DQPd
NF/
I/O
No Function/Parity Data I/Os: On the x32 version, these are No
Function (NF). On the x18 version, Byte
“
a
”
parity is DQPa; Byte
“
b
”
parity is DQPb. On the x36 version, Byte
“
a
”
parity is DQPa;
Byte
“
b
”
parity is DQPb; Byte
“
c
”
parity is DQPc; Byte
“
d
”
parity
is DQPd.
Supply Power Supply:
See DC Electrical Characteristics and Operating
Conditions for range.
Supply Isolated Output Buffer Supply: See DC Electrical Characteristics
and Operating Conditions for range.
2J, 4C, 4J,
4R, 5R, 6J
1A, 1F, 1J,
1M, 1U, 7A,
7F, 7J, 7M,
7U
2J, 4C, 4J,
4R, 5R, 6J
1A, 1F, 1J,
1M, 1U, 7A,
7F, 7J, 7M,
7U
V
DD
V
DD
Q
(continued on next page)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT58L128L18D | 128K x 18,3.3V I/O, Pipelined, Double-Cycle Deselect，SyncBurst SRAM(2Mb，3.3V輸入/輸出，流水線式，雙循環(huán)取消選擇，同步脈沖靜態(tài)RAM) |
| MT58L64L32D | 64K x 32，3.3V I/O, Pipelined, Double-Cycle Deselect，SyncBurst SRAM(2Mb，3.3V輸入/輸出，流水線式，雙循環(huán)取消選擇，同步脈沖靜態(tài)RAM) |
| MT58L128L18F | 128K x 18, Flow-Through SyncBurst SRAM(2Mb,流通式同步脈沖靜態(tài)RAM) |
| MT58L128V18F | 128K x 18, Flow-Through SyncBurst SRAM(2Mb,流通式同步脈沖靜態(tài)RAM) |
| MT58L64L32F | 64K x 32,Flow-Through SyncBurst SRAM(2Mb,流通式同步脈沖靜態(tài)RAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT55L512L18PF-7.5 | 制造商:Cypress Semiconductor 功能描述:8MB 512KX18 SRAM PLASTIC FBGA |
| MT55L512V18P | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:8Mb ZBT SRAM |
| MT55L512Y32PF-10 | 制造商:Micron Technology Inc 功能描述: |
| MT55L512Y32PT-10 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Micron Technology Inc 功能描述: |
| MT55L512Y32PT-6 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Micron Technology Inc 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。