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256Mb: x4, x8, x16 SDRAM
256MSDRAM_E.p65
–
Rev. E; Pub. 3/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
256Mb: x4, x8, x16
SDRAM
WRITE – WITH AUTO PRECHARGE
1
NOTE:
1. For this example, the burst length = 4.
2. x16: A9, A11, and A12 =
“
Don
’
t Care
”
x8: A11 and A12 =
“
Don
’
t Care
”
x4: A12 =
“
Don
’
t Care
”
*CAS latency indicated in parentheses.
-7E
-75
SYMBOL*
t
CMS
t
DH
t
DS
t
RAS
t
RC
t
RCD
t
RP
t
WR
MIN
1.5
0.8
1.5
37
60
15
15
1 CLK +
7ns
MAX
MIN
1.5
0.8
1.5
44
66
20
20
1 CLK +
7.5ns
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
–
120,000
120,000
TIMING PARAMETERS
-7E
-75
SYMBOL*
t
AH
t
AS
t
CH
t
CL
t
CK (3)
t
CK (2)
t
CKH
t
CKS
t
CMH
MIN
0.8
1.5
2.5
2.5
7
7.5
0.8
1.5
0.8
MAX
MIN
0.8
1.5
2.5
2.5
7.5
10
0.8
1.5
0.8
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ENABLE AUTO PRECHARGE
tCH
tCL
tCK
tRP
tRAS
tRC
tRCD
DQM/
DQML, DQMU
CKE
CLK
A0-A9, A11, A12
DQ
BA0, BA1
A10
tCMH
tCMS
tAH
tAS
ROW
ROW
BANK
BANK
ROW
ROW
BANK
tWR
DON
’
T CARE
D
IN
m
tDH
tDS
D
IN
m
+ 1
D
IN
m
+ 2
D
IN
m
+ 3
COMMAND
tCMH
tCMS
NOP
NOP
NOP
ACTIVE
NOP
WRITE
NOP
ACTIVE
tAH
tAS
tAH
tAS
tDH
tDS
tDH
tDS
tDH
tDS
tCKH
tCKS
NOP
NOP
COLUMN
m
2
T0
T1
T2
T4
T3
T5
T6
T7
T8
T9