
Table of Contents
Chapter 1 Overview
1.1 Overview .......................................................................................................... 1-1
1.2 Features ........................................................................................................... 1-1
1.3 Block Diagram .................................................................................................. 1-3
1.4 Pin Configuration ............................................................................................. 1-4
1.5 Pin Description ................................................................................................. 1-7
1.5.1 Description of Each Pin ........................................................................ 1-7
1.5.2 Unused Pin Description ........................................................................ 1-12
1.6 Basic Timing .................................................................................................... 1-13
Chapter 2 CPU
2.1 Overview .......................................................................................................... 2-1
2.2 Layout of Registers .......................................................................................... 2-2
2.2.1 Registers A, B, H, L, X and Y ............................................................... 2-3
2.2.2 Program Counter (PC) .......................................................................... 2-4
2.2.3 Stack Pointer (SP) ................................................................................ 2-4
2.2.4 Carry Flag (C) ....................................................................................... 2-4
2.3 Memory Space ................................................................................................. 2-5
2.3.1 Program Memory Space ....................................................................... 2-5
2.3.2 Data Memory Space ............................................................................. 2-6
2.3.2.1 Data Memory Space ............................................................... 2-6
2.3.2.2 Bank Selection of Data Memory ............................................. 2-7
2.3.2.3 Addressing Modes of Data Memory ....................................... 2-8
Chapter 3 CPU Control Functions
3.1 Overview .......................................................................................................... 3-1
3.2 System Reset Function .................................................................................... 3-2
3.2.1 System Reset Operation by
RESET Input Pin ...................................... 3-2
3.2.2 State at System Reset .......................................................................... 3-4
3.3 Halt Mode ......................................................................................................... 3-7
3.3.1 Halt Mode Register (HALT) .................................................................. 3-7
3.3.2 Operation of Halt Mode ........................................................................ 3-7
Chapter 4 Interrupt (INTC)
4.1 Overview .......................................................................................................... 4-1
4.2 Interrupt Sequence .......................................................................................... 4-3
4.3 Interrupt Control Registers ............................................................................... 4-4
4.3.1 Interrupt Request Registers (IRQ0, IRQ1 and IRQ2) ........................... 4-4
4.3.2 Interrupt Enable Registers (IE0, IE1 and IE2) ...................................... 4-7
4.3.3 Master Interrupt Enable Register (MIEF) .............................................. 4-9
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