參數(shù)資料
型號： MSM6262-04GS-BK
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 顯示控制器
英文描述： 48 X 80 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP80
封裝： 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù)： 18/53頁
文件大?。?/td> 602K
代理商： MSM6262-04GS-BK
Semiconductor
MSM6262-04
25/53
FEDL6262-04-03
9. Character Generator RAM (CG RAM)
The CG RAM is used to display user's original character pattern other than CG ROM.
The CG RAM has capacity (32 bytes = 256 bits) to write 4 kinds of 5 x 8 dots and 2 kinds of 5
x 12 dots.
In displaying the character pattern stored in the CG RAM, CG RAM has to be enabled by an
instruction. When CG RAM is enabled, CG ROM code for 16 characters cannot be read out
since the CGROM code with all "L" on the upper 4 bits is used as CG RAM code.
The following describes how to write character patterns into the CG RAM and how to display
them on the LCD.
(1) When the character pattern is 5 x 8 dots (See Table 2-1)
A method to write character pattern into the CG RAM by the CPU
The lower 3 bits (0 - 2) of the CG RAM address correspond to the line position of the
character pattern. The upper 2 bits (3, 4) of the CG RAM address correspond to the lower
2 bits (0, 1) of the character code.
First, set increment of decrement by the CPU, and then input CG RAM address. After this,
write character pattern data into CG RAM through DB0 to DB7 line by line.
DB0 - DB7 correspond to CG RAM data 0 - 7 in Table 2-1.
Display is turned on when "H" is set as input data and turned off when "L" is set as input
data.
Since the ADC is automatically incremented or decremented by 1 after the writing of data
to the CG RAM, it is not necessary to set the CG RAM address again.
To enable cursor display, set all input data on the line where the lower 3 bits of the CG RAM
(0-2) are all "H" to "L".
0 - 4 bits of CG RAM data are output to the LCD as the display data; however, 5 - 7 bits of
CG RAM data are not. But it can be used as the data RAM because the data can be written/
read through DB0 to DB7.
A method to display the CG RAM character pattern to the LCD
First, an instruction to enable the CG RAM has to be input from the CPU. CG RAM is
selected only when all of the upper 4 bits of the character code is "L".
So, the character pattern of CG RAM is displayed on the LCD position that corresponds to
the DD RAM address, when the character code shown in Table 2-1 is written into DD RAM.
Since the bits 2 and 3 of the character code are regarded as invalid, "K" is displayed when
the character codes "01", "05", "'09", and "0D" are selected.
(2) When the character pattern is 5 x 12 dots (See Table 2-2)
A method to write character pattern into the CG RAM by the CPU
The lower 4 bits of CG RAM address (0 - 3) correspond to the line position of the character
pattern.
The upper 1 bit of CG RAM address bit 4 corresponds to the bit 1 of the character code.
First, set increment or decrement by the CPU, and then input CG RAM address.
After this, write the character pattern data into CG RAM through DB0 to DB7 line by line.
DB0 - DB7 correspond to CG RAM data 0 - 7 in Table 2-2.
Display is turned on when "H" is set as the input data and turned off when "L" is set
相關PDF資料
PDF描述
MSM6262-XXGS-BK 48 X 80 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP80
MSM63182A-XXX 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC107
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MSM63184-XXXGS-K 4-BIT, MROM, MICROCONTROLLER, PQFP128
MSM63184B-XXX 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC123
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