
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 16
Freescale Semiconductor
53
Note:
For some TDM modes, transmit data is output on other pins. This timing is also valid for those pins. See the
MSC8144 Reference Manual
2.6.8
UART Timing
Figure 20. TDM Output Signals
Table 38. UART Timing
Characteristics
Symbol
Expression
Min
Max
Unit
URXD and UTXD inputs high/low duration
TUREFCLK
16
× TREFCLK
160
—
ns
Note:
TUREFCLK = TREFCLK is guaranteed by design.
Figure 21. UART Input Timing
Figure 22. UART Output Timing
TDMxTCLK
TDMxTDAT
~ ~
TDMxTSYN
~ ~
tTDMDHOX
tTDMDHOV
tTDMDHOZ
tTDMHOX
tTDMC
tTDMCH
tTDMCL
tTDMSHOX
tTDMSHOV
UTXD, URXD
TUREFCLK
inputs
TUREFCLK
UTXD output
TUREFCLK