參數(shù)資料
型號： MSC8101VT1250F
廠商： Freescale Semiconductor
文件頁數(shù)： 60/104頁
文件大?。?/td> 0K
描述： IC DSP 16BIT 250MHZ 332-FCPBGA
標(biāo)準(zhǔn)包裝： 90
系列： StarCore
類型： SC140 內(nèi)核
接口： 通信處理器模塊（CPM）
時鐘速率： 250MHz
非易失內(nèi)存： 外部
芯片上RAM： 512kB
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 1.60V
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 332-BFBGA，F(xiàn)CPBGA
供應(yīng)商設(shè)備封裝： 332-FCBGA（17x17）
包裝： 托盤
AC Timings
MSC8101 Technical Data, Rev. 19
Freescale Semiconductor
2-19
Figure 2-12 and Figure 2-13 show HDI16 read signal timing. Figure 2-14 and Figure 2-15 show HDI16 write
signal timing.
Notes:
1.
TC = 1/ DSPCLK. At 300 MHz, TC = 3.3 ns
2.
In the timing diagrams below, the controls pins are drawn as active low. The pin polarity is programmable.
3.
VCC = 3.3 V ± 0.3 V; TJ = –40°C to +100 °C, CL = 50 pF
4.
The read data strobe is HRD/HRD in the dual data strobe mode and HDS/HDS in the single data strobe mode.
5.
In 64-bit mode, The “l(fā)ast data register” is the register at address $7, which is the last location to be read or written in data
transfers. This is RX0/TX0 in the little endian mode (HBE = 0), or RX3/TX3 in the big endian mode (HBE = 1).
6.
This timing is applicable only if a read from the “l(fā)ast data register” is followed by a read from the RXL, RXM, or RXH registers
without first polling RXDF or HREQ bits, or waiting for the assertion of the HREQ/HREQ signal.
7.
This timing is applicable only if two consecutive reads from one of these registers are executed.
8.
The write data strobe is HWR in the dual data strobe mode and HDS in the single data strobe mode.
9.
The data strobe is host read (HRD/HRD) or host write (HWR/HWR) in the dual data strobe mode and host data strobe
(HDS/HDS) in the single data strobe mode.
10. The host request is HREQ/HREQ in the single host request mode and HRRQ/HRRQ and HTRQ/HTRQ in the double host
request mode. HRRQ/HRRQ is deasserted only when HOTX fifo is empty, HTRQ/HTRQ is deasserted only if HORX fifo is full
(treat as level Host Request).
11.
Compute the value using the expression.
Figure 2-12.
Read Timing Diagram, Single Data Strobe
Table 2-19.
Host Interface (HDI16) Timing1, 2 (Continued)
Number
Characteristics3
Expression
Value
Unit
HDS
HA[0–3]
HCS[1–2]
HD[0–15]
50
55
44c
44b
44a
53
52
58
57
51
49
61
56
HREQ (single host request)
HRW
57
58
HRRQ (double host request)
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