參數(shù)資料
型號: MSC1210Y3PAGTG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQFP64
封裝: GREEN, PLASTIC, TQFP-64
文件頁數(shù): 74/94頁
文件大?。?/td> 913K
代理商: MSC1210Y3PAGTG4
MSC1210
SBAS203J MARCH 2002 REVISED JANUARY 2008
www.ti.com
76
Enable Interrupt Control (EICON)
7
6
5
4
3
2
1
0
Reset Value
SFR D8h
SMOD1
1
EAI
AI
WDTI
0
40h
SMOD1
Serial Port 1 Mode. When this bit is set the serial baud rate for Port 1 will be doubled.
bit 7
0 = Standard baud rate for Port 1 (default).
1 = Double baud rate for Port 1.
EAI
Enable Auxiliary Interrupt. The Auxiliary Interrupt accesses nine different interrupts which are masked and
bit 5
identified by SFR registers PAI (SFR A5h), AIE (SFR A6h), and AISTAT (SFR A7h).
0 = Auxiliary Interrupt disabled (default).
1 = Auxiliary Interrupt enabled.
AI
Auxiliary Interrupt Flag. AI must be cleared by software before exiting the interrupt service routine, after the source
bit 4
of the interrupt is cleared. Otherwise, the interrupt occurs again. Setting AI in software generates an Auxiliary
Interrupt, if enabled.
0 = No Auxiliary Interrupt detected (default).
1 = Auxiliary Interrupt detected.
WDTI
Watchdog Timer Interrupt Flag. WDTI must be cleared by software before exiting the interrupt service routine.
bit 3
Otherwise, the interrupt will occur again. Setting WDTI in software generates a watchdog time interrupt, if enabled.
The Watchdog timer can generate an interrupt or reset. The interrupt is available only if the reset action is disabled
in HCR0.
0 = No Watchdog Timer Interrupt detected (default).
1 = Watchdog Timer Interrupt detected.
ADC Results Register Low Byte (ADRESL)
7
6
5
4
3
2
1
0
Reset Value
SFR D9h
LSB
00h
ADRESL
The ADC Results Low Byte. This is the low byte of the 24-bit word that contains the ADC converter results.
bits 70
Reading from this register clears the ADC interrupt. However, AI in EICON (SFR D8h) must also be cleared.
ADC Results Register Middle Byte (ADRESM)
7
6
5
4
3
2
1
0
Reset Value
SFR DAh
00h
ADRESM
The ADC Results Middle Byte. This is the middle byte of the 24-bit word that contains the ADC converter results.
bits 70
ADC Results Register High Byte (ADRESH)
7
6
5
4
3
2
1
0
Reset Value
SFR DBh
MSB
00h
ADRESH
The ADC Results High Byte. This is the high byte of the 24-bit word that contains the ADC converter results.
bits 70
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